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#lattice — Public Fediverse posts

Live and recent posts from across the Fediverse tagged #lattice, aggregated by home.social.

  1. 🎩 Behold, the mathematical wizardry of Joel David Hamkins, who has boldly declared that sets of natural numbers have a rich #lattice structure! 🤔 Truly #groundbreaking, except for the tiny detail that everyone with a basic understanding of set theory already knows this. Bravo, Professor Hamkins, for turning the obvious into a revelation! 🎉
    jdh.hamkins.org/the-lattice-of #mathematics #settheory #academiccommunity #naturalnumbers #HackerNews #ngated

  2. “UK boss brags about improving UK military ‘kill chain’”

    by Joe Glenton in The Canary

    @thecanaryuk
    @uk_politics
    @UKLabour
    @[email protected]
    @[email protected]

    “The British military finds itself in dubious company once again. Relying on Anduril’s technology ties the UK deeper into the US-Israeli colonial security framework. The firm claims it isn’t using fully autonomous killing systems yet, but has made clear that capacity exists. These rapid developments are outstripping international law’s ability to catch up — with dangerous implications for everyone”

    thecanary.co/uncategorized-en/

    #Press #SocialMedia #UK #BritishMilitary #Anduril #KillChain #Israel #US #Colonial #AutonomousKilling #Rafael #Oracle #Lattice

  3. A regular customer in Seneca required the replacement of a custom-built lattice archway. The project required some minor fabrication to achieve, but the result duplicates what the previous archway would have looked like when new some 30 years ago!

    #andersonsc #clemsonsc #senecasc #pendletonsc #handyman #tuxedohomemaintenance #decking #deckrepair #deckrefinishing #DeckSealing #lattice

  4. FPGA development board in a #microSD form factor
    C0-microSD
    #Lattice #ICE40UP5K #FPGA
    5280 logic cells
    120 Kbit dual-port Block RAM
    1 Mbit (128 KB) single-port RAM
    #Renesas #AT25QL128A SPI Flash
    128 Mbit (16 MB) non-volatile memory
    Programmable I/O pins:
    Two on-board leds (one red and one green), for status indication.
    Six programmable I/O pins (from the microSD interface)
    Five additional programmable pins on test pads
    Built-in #Signaloid C0 #RISC-V processor core
    Built-in bootloader, allowing you to load new FPGA bitstreams or RISC-V applications via the SD interface