#lattice — Public Fediverse posts
Live and recent posts from across the Fediverse tagged #lattice, aggregated by home.social.
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🎩 Behold, the mathematical wizardry of Joel David Hamkins, who has boldly declared that sets of natural numbers have a rich #lattice structure! 🤔 Truly #groundbreaking, except for the tiny detail that everyone with a basic understanding of set theory already knows this. Bravo, Professor Hamkins, for turning the obvious into a revelation! 🎉
https://jdh.hamkins.org/the-lattice-of-sets-of-natural-numbers-is-rich/ #mathematics #settheory #academiccommunity #naturalnumbers #HackerNews #ngated -
A regular customer in Seneca required the replacement of a custom-built lattice archway. The project required some minor fabrication to achieve, but the result duplicates what the previous archway would have looked like when new some 30 years ago!
#andersonsc #clemsonsc #senecasc #pendletonsc #handyman #tuxedohomemaintenance #decking #deckrepair #deckrefinishing #DeckSealing #lattice
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A regular customer in Seneca required the replacement of a custom-built lattice archway. The project required some minor fabrication to achieve, but the result duplicates what the previous archway would have looked like when new some 30 years ago!
#andersonsc #clemsonsc #senecasc #pendletonsc #handyman #tuxedohomemaintenance #decking #deckrepair #deckrefinishing #DeckSealing #lattice
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Video Pipeline Recommendations
General advice on which technology to use when doing real time image processing. It depends strongly on what bandwidth you need, and what you want to accomplish.
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I started a project page to document my first FPGA project on a long while, mainly so that I don't forget, but could possibly be useful to others... I'll plan to add subsequent projects and make more progress on this one in the next few weeks and months.
"I bought myself a Radiona ULX3S from CrowdSupply, which includes the 85k Lattice ECP5 FPGA, which can be programmed to simulate the open source 32-bit RISC-V CPU with a completely open source LiteX-yosys-nextpnr, toolchain."
https://blog.bomorgan.io/hobbies/hardware/fpgas/litex-riscv-ecp5-ulx3s/
#riscv #foss #fpga #litex #yosys #nextpnr #linux #crowdsupply #radiona #ulx3s #lattice #ecp5
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FPGA development board in a #microSD form factor
C0-microSD
#Lattice #ICE40UP5K #FPGA
5280 logic cells
120 Kbit dual-port Block RAM
1 Mbit (128 KB) single-port RAM
#Renesas #AT25QL128A SPI Flash
128 Mbit (16 MB) non-volatile memory
Programmable I/O pins:
Two on-board leds (one red and one green), for status indication.
Six programmable I/O pins (from the microSD interface)
Five additional programmable pins on test pads
Built-in #Signaloid C0 #RISC-V processor core
Built-in bootloader, allowing you to load new FPGA bitstreams or RISC-V applications via the SD interface