#nextpnr — Public Fediverse posts

I've been playing around with #LiteX and #migen #HDL lately and I think it's finally starting to sink in that you can really just do almost arbitrary amounts of "stuff" per clock (limitations apply, objects in mirror may appear closer etc).

It's really very fun! And between trellis, #yosys and #nextpnr you can just... Do it without begging any vendor for a free copy of an EDA.

I highly recommend it! It's so much fun!

You can make your own SoC with deranged peripherals!

#electronics #fpga

This is a wiki about processing video in real time using microcontrollers, ASICs and FPGAs. The related paper was accepted for the Open Source Hardware Conference in Chemnitz Germany, Nov 24-25 2025.

Comment on the page by replying to this toot. #Introduction

#OSHOP #OpenSource #Hardware #FPGA #Yosys #Nextpnr #Video #Pipelines #Introduction

https://wiki.pythonlinks.info/video

@PaulaMaddox Well, I've got the gui tool installed and I see I can start with a demo that echoes data back via the Ft+ V2... that seems like a great start.

Crossing fingers.

I'm not worried about an upload tool much. More about design lock in or other anti-patterns.

I'd love to get experience with #yosys and #nextpnr and maybe this will be my excuse to try.

We had a very productive #FSD meeting earlier today! Check out what we accomplished: https://www.fsf.org/blogs/licensing/fsd-meeting-recap-2025-02-21 #FreeSoftware #Licensing #nextpnr #Yosys

I started a project page to document my first FPGA project on a long while, mainly so that I don't forget, but could possibly be useful to others... I'll plan to add subsequent projects and make more progress on this one in the next few weeks and months.

"I bought myself a Radiona ULX3S from CrowdSupply, which includes the 85k Lattice ECP5 FPGA, which can be programmed to simulate the open source 32-bit RISC-V CPU with a completely open source LiteX-yosys-nextpnr, toolchain."

https://blog.bomorgan.io/hobbies/hardware/fpgas/litex-riscv-ecp5-ulx3s/

#riscv #foss #fpga #litex #yosys #nextpnr #linux #crowdsupply #radiona #ulx3s #lattice #ecp5

Just got a 32-bit RISC-V SoC programmed into the Lattice ECP5 FPGA on Radiona's ULX3S using the completely open source LiteX toolchain, including yosys and nextpnr.

#fosh #foss #oshw #fpga #riscv #linux #litex #yosys #nextpnr

Clearly the #LatticeSemi #ECP5 (and iCE40) #FPGA dominates the landscape of #yosys / #nextpnr compatible dev kits but where are the #Nexus board? Anyone knows why? Availability, unfamiliarity, value, performance?

AHHHH! I finally got a ring oscillator working on #ECP5 with the #Yosys / #Nextpnr tool chain (I’m not complaining, I’m happy they exist and I’m doing something unorthodox)

You have to instantiate the inverters as LUTs directly *AND* you have to build the latest tools yourself (I had two different binaries segfault on the design).

https://github.com/YosysHQ/nextpnr/issues/1194#issuecomment-1684724413
#verilog #fpga #ncl #asynclogic

FPGA Starter Videos To Help Soften That Learning Curve - Digi-Key have been producing YouTube videos for a number of years now, and if you ... - https://hackaday.com/2022/02/17/fpga-starter-videos-to-help-soften-that-learning-curve/ #projecttrellis #blackice #icestorm #gtkwave #lattice #mystorm #nextpnr #icarus #ice40 #yosys #fpga #apio