#ecp5 — Public Fediverse posts

The @RadionaOrg ULX3S hub site now honors device dark mode! Sunglasses no longer needed 😎

I also added a Tiny Tapeout section, as (pending a few Pull Request merges) @latticesemi #ECP5 FPGA support for testing your ASIC design on the #ULX3S is coming to @tinytapeout

I'm making lots of progress on the HydraSucréLA bringup! 🎺

Open source sw/hw/gateware logic analyzer incoming!

It's already capturing 🎉 🥳

#opensource #hardware #fpga #ecp5 #LiteX

Icepi Zero is an open source FPGA board in a Raspberry Pi Zero-sized form factor (crowdfunding)

Nearly a decade ago, Raspberry Pi showed that it’s possible to cram a fully functional computer into a tiny package that’s about the size of a stick of chewing gum or about the size of a USB flash drive. In time since the first Raspberry Pi Zero launched we’ve seen a bunch of updates as well as third-party boards with a similar design but different hardware.

But the Icepi Zero stands out for a […]

#crowdfunding #ecp5 #fpga #icepiZero #openHardware #openSource #raspberryPiZero #sbc

Read more: https://liliputing.com/icepi-zero-is-an-open-source-fpga-board-in-a-raspberry-pi-zero-sized-form-factor/

Pro tips when using Migen's SyncFIFO() module in your pipeline design...

I went from 70 MHz max frequency to 100+ MHz by just adding this parameter: `buffered=True`

It helped a lot for timing closure of the design :)

#FPGA #ECP5 #OpenSource #LiteX #Migen #SucréLA #HydraSucréLA

I started a project page to document my first FPGA project on a long while, mainly so that I don't forget, but could possibly be useful to others... I'll plan to add subsequent projects and make more progress on this one in the next few weeks and months.

"I bought myself a Radiona ULX3S from CrowdSupply, which includes the 85k Lattice ECP5 FPGA, which can be programmed to simulate the open source 32-bit RISC-V CPU with a completely open source LiteX-yosys-nextpnr, toolchain."

https://blog.bomorgan.io/hobbies/hardware/fpgas/litex-riscv-ecp5-ulx3s/

#riscv #foss #fpga #litex #yosys #nextpnr #linux #crowdsupply #radiona #ulx3s #lattice #ecp5

https://www.reddit.com/r/FPGA/comments/1hvtgn9/fpga_developers_forum_2025_call_for_abstracts/

#fpga #conference #cfp #gatemate #ice40 #ecp5 #xilinx #altera #lattice

I am building a many core #Forth processor on Lattice Semiconductor FPGAs using the open source #Yosys tools. The first products released will be two 4 core processors. 16K* 16 bit words or 10.6K * 24 bit words. Every pair of processors will communicate using 10Kbits of dual port RAM. The processors will run on the $35 #PicoIce and $30 #Upduino boards. Later there will be hundreds of cores on the larger #ULX3S #ECP5 boards.

My climate persona: @UncensoredNews
#fpga #ManyCore #introduction

Heya #fpga #embedded crowd!

Is there any #ECP5 dev board/module out there, that basically breaks out most of the IOs of the LFE5U-85?

I'm looking for something like the Colorlight i9, but for my project, i need to have the LFE5U-85.

#latticesemi #yosys #pmod