#upduino — Public Fediverse posts
Live and recent posts from across the Fediverse tagged #upduino, aggregated by home.social.
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I am building a many core #Forth processor on Lattice Semiconductor FPGAs using the open source #Yosys tools. The first products released will be two 4 core processors. 16K* 16 bit words or 10.6K * 24 bit words. Every pair of processors will communicate using 10Kbits of dual port RAM. The processors will run on the $35 #PicoIce and $30 #Upduino boards. Later there will be hundreds of cores on the larger #ULX3S #ECP5 boards.
My climate persona: @UncensoredNews
#fpga #ManyCore #introduction