#upduino — Public Fediverse posts
Live and recent posts from across the Fediverse tagged #upduino, aggregated by home.social.
-
#ZeptoForth boots on the #PicoIce, which means that the default power, usb and flash pins are correctly connected. Which means that #MicroPython and #Mecrisp probably boot as well.
As soon as I get my #FPGA working on the #Upduino, I want to buy a Pico-Ice, and check out the REPLs..
-
I am building a many core #Forth processor on Lattice Semiconductor FPGAs using the open source #Yosys tools. The first products released will be two 4 core processors. 16K* 16 bit words or 10.6K * 24 bit words. Every pair of processors will communicate using 10Kbits of dual port RAM. The processors will run on the $35 #PicoIce and $30 #Upduino boards. Later there will be hundreds of cores on the larger #ULX3S #ECP5 boards.
My climate persona: @UncensoredNews
#fpga #ManyCore #introduction -
Whoa!
PORT CRYSIS, OBVIOUSLY!!! 😆
Better yet, port #uxn.
It's a porter's dream, and I think it will become a big hit with the retro community.
-
Ok. I have a very basic 40 column text mode working using the uart for input. I’m trying to decide what my next step should be.
-
Well, I’ve got colors. Although, not the colors I want. The “white” is very yellow. They are all very dim. And I have these vertical bars appearing as well. Not sure what’s causing that.
-
Resistor DACs are “fun”.
-
Tonight I:
- soldered header pins onto the #upduino
- wrote some simple verilog to generate VGA sync pulses
- wrote some more verilog to write numbers (b&w only)
- wired this thing up to a monitor -
This was a productive evening.