#gatemate — Public Fediverse posts
Live and recent posts from across the Fediverse tagged #gatemate, aggregated by home.social.
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Cologne Chip continues to push the FPGA ecosystem forward with support for free and open-source toolchain. By releasing a fully open-source toolchain, YosysHQ establish Cologne Chip as a leading supporter of transparent FPGA development. https://colognechip.com/programmable-logic/gatemate/toolchain/ #FPGA #OpenSource #GateMate #EDA
EDIT: as per @infosecdj note CologneChip did not release the toolchain. It is run by @yosyshq
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This is the basic #Silice VGA test, somewhat of a tradition, I always start there when adding a new board. Who's new in this list ? Yes! Working on integrating the GateMate A1 evaluation board! Stay tuned for more info soon. #CologneChips #GateMate
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GateMate DVI out.
1080P (1920×1080) @60 FPS on the #GateMate #FPGA using the TI TFP410.
He does 2 pixels per clock internally at ~74.25 Mhz, externally uses DDR at 148.5 MHz
https://elektronaut.tech/en/fpga/driving-full-hd-video-with-the-cologne-chip-gatemate-fpga/
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@xcabal05
I am interested in #LibreRouter technology.The European made #GateMate #FPGA has a #5Gbps #Serdes. I can use it to do #UDP #camera in and display out. So I am just learning about the internet protocol, starting with voltages.
Which Open Source UDP library should I be using? is there one you recommend in Verilog?
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There is now a github repository to compare the performance of FPGAs. The repository contains test cases for adders, counters and muxes. Now we know how much faster GateMate is than ICE40.
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Thank you @BalCCon it was again amazing experiences to be part of this super cool conference! This year I have talked about new #ULX5M board that is hosting #EU #CologneChip #GateMate chip, held small talk about #RadionaORG #ZigZag badge and had #Assembly where it was possible to assemble personalized badge!
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Tiny Shader running on the GateMateA1-EVB with an open source toolchain 🎉
Originally this design was created for Tiny Tapeout, more information can be found here: https://github.com/mole99/tt06-tiny-shader
And if you want to see the TT06 chip in action, take a look at this thread: https://fosstodon.org/@mole99/113730908871370284
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I've got myself a new toy 🙌
This is the GateMateA1-EVB from Olimex, an FPGA dev board containing the GateMate CCGM1A1 with 20480 CPEs.
Now that initial nextpnr support for the chip has been merged, it is possible to program it with a fully open source toolchain 🎉
Synthesis with Yosys, place and route with nextpnr, bitstream packing with gmpack and finally upload to the board with openFPGALoader!That meant I just had to get one, and two days later it arrived!
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I am so glad to report that Cologne Chip will be sponsoring the CERN 2025 FPGA conference. The email announcement just arrived.
Very motivating.
https://indico.cern.ch/event/1467417/ -
@AlgoCompSynth
Mecrisp Ice has a couple of 32 bit soft core stack machines, but I have not paid close attention to them. Music is fine with 16 bits. Real world control is usually at 20-22 bits. Video is 24 bits. FPGA real estate is both expensive, and slows things, so not much reason to go beyond 24 bits. Sadly I do not know of any fpgA with 24 bit memory. #GateMate has 20 bit memory, on a $50 board. Most interesting; -
Rumor has it that #CologneChips will be presenting #GateMate at the Space Components Confeence in May 2025.
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Cologne Chips writes about the new #olimex #gatemate add on boards.
#fpga #EUMade
https://colognechip.com/news/new-extensions-for-the-olimex-gatemate-fpga-board/ -
The person who is porting #Yosys #NextPrN to #Gatemate on the #olimex board, is discussing his work on this Discord channel. #fpga #digitalmath #addition #multiplication #gaussianlogarithms.
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How to do addition on #GateMate FPGAs using two bit adders. #Digitalmath #vectors
#twobitadders.
#FPGA #Forth