Search
1000 results for “Chispa”
-
Springfield’s Myers Market re-launches with new dining concepts https://www.diningandcooking.com/2387436/springfields-myers-market-re-launches-with-new-dining-concepts/ #2025 #Augusta #ChipAndPuttNationalFinals #Cooking #CookingTopics #dcp #Drive #Masters #national #Tournament
-
Springfield’s Myers Market re-launches with new dining concepts https://www.diningandcooking.com/2387436/springfields-myers-market-re-launches-with-new-dining-concepts/ #2025 #Augusta #ChipAndPuttNationalFinals #Cooking #CookingTopics #dcp #Drive #Masters #national #Tournament
-
Examining #RDNA4's out-of-order memory accesses in detail, and investigating with testing
#RDNA 4's memory subsystem enhancements are exciting and improve performance across a variety of workloads. #AMD specifically calls out benefits in #raytracing. But RDNA 4's scheme for handling memory dependencies isn't fundamentally different from that of #GCN many years ago. RDNA 4’s makes the most significant change to AMD’s #GPU memory subsystem since RDNA launched in 2019.
https://chipsandcheese.com/p/rdna-4s-out-of-order-memory-accesses -
Abgesehen von Prozessor und Grafik basieren alle T470 auf der gleichen Plattform, dem Intel #SunrisePoint Chipsatz (100 Series). Daher funktionieren alle von Lenovo bereitgestellten Treiber für Windows 7. Der #Firefox 115 ESR wird noch bis 2026 unterstützt. Er kann #VP9 codierte Videos auf der iGPU hardwareunterstützt abspielen. Damit hat man ein vollwertiges aktuelles System. Der Sysinternals Process Explorer Version 17.06 funktioniert, die vor kurzem erschienene Version 17.07 leider nicht mehr
-
La ley aprobada en Chiapas obliga al personal médico a garantizar un procedimiento seguro, gratuito y de calidad a niñas y adolescentes. Además, se debe notificar a las autoridades sobre los casos de violación. Una decisión libre e informada. #ILE https://zurl.co/zUDNs
-
La ley aprobada en Chiapas obliga al personal médico a garantizar un procedimiento seguro, gratuito y de calidad a niñas y adolescentes. Además, se debe notificar a las autoridades sobre los casos de violación. Una decisión libre e informada. #ILE https://zurl.co/zUDNs
-
RT by @CAMegalopolis: En los estados de #Sonora, #Durango, #Jalisco, #Michoacán, #Nayarit, #SanLuisPotosí, #Guerrero, #Morelos, #Oaxaca, #Chiapas y #QuintanaRoo, 984 personas realizan labores de control y liquidación en 39 incendios forestales activos en el país 🔥🌳.
-
Sizing up #MI300A’s #GPU
It’s well ahead of #Nvidia’s #H100 PCIe for just about every major category of 32- or 64-bit operations. MI300A can achieve 113.2 TFLOPS of #FP32 throughput, with each FMA counting as two floating point operations. For comparison, H100 PCIe achieved 49.3 TFLOPS in same test.
#AMD cut down #MI300X’s GPU to create MI300A. 24 #Zen4 cores is a lot of #CPU power, and occupies one quadrant on the MI300 chip. But MI300’s main attraction is still the GPU.
https://chipsandcheese.com/p/sizing-up-mi300as-gpu -
AMD Disables Zen 4's Loop Buffer
https://chipsandcheese.com/p/amd-disables-zen-4s-loop-buffer
-
#Zen5 Variants and More, Clock for Clock
They compare #Zen 5 variants along with a pile of older cores with clock speed taken out of the equation as much as possible. That means capping clock speeds on all CPUs to the lowest clocking chip. In this case, that’s the #3GHz Athlon II X2 651.
Desktop Zen 5 takes a healthy 20.8% lead over #Zen4 in the most comparable configuration. #VCache gives Zen 4 96 MB of L3 cache which shrinks Zen 5’s lead to a still significant 16.6%.
https://chipsandcheese.com/2024/08/20/zen-5-variants-and-more-clock-for-clock/ -
Intel Beats Q3 Expectations with $13.7B Revenue, But High-Stakes Foundry Turnaround Looms
#Intel #Q32025 #INTC #Tech #Semiconductors #CHIPSAct #LipBuTan #Foundry #Investing #StockMarket #Business #AI #Manufacturing #Technology
-
Digital painting: Ambiguous impulses for your own mental cinema!
#kunst #contemporaryArt #mentalCinema #digitalPainting #virtualPainting #aiAssistedArt #digitalArt #saveBioDiversity #climateActionNow #systemChange #endFossilFuels #makeArtNotWar #noAFD #NoRacism #NoFascism #humanRights #humanDignity #Нетвойны #drawings #faces #grimaces #eyesWideOpen #staring #chimpanzee #skateBoard #skating #monkey #anatomy #theDisplay #revelation #watchMe #innerself #exposure -
Digital painting: Ambiguous impulses for your own mental cinema!
#kunst #contemporaryArt #mentalCinema #digitalPainting #virtualPainting #aiAssistedArt #digitalArt #saveBioDiversity #climateActionNow #systemChange #endFossilFuels #makeArtNotWar #noAFD #NoRacism #NoFascism #humanrights #humanDignity #Нетвойны #chimpanzee #skateBoard #flag #pax #peace #protest #demonstration #sword #tracht #traditionalCostume -
Si la vida fuese materializable en su conjunto y la sajásemos, ¿qué tipo de sección quedaría? ¿Qué hallaríamos al estudiar sus capas y el modo en que interactúan?
Si abro los ojos no es real parece una respuesta temática y sonora a esa pregunta. Aunque el interrogante me brotó tras escucharlo un par de veces con los textos delante y no como pregunta filosófica surgida de la nada, las mejores.
Uno de mis tracks favoritos de Charli XCX es Visions. Romero inicia 'Si abro' con Visión, una intro preciosa que nos transporta a bandas sonoras animadas. En parte, este disco es muy visual. Visión es pertinente en todos los sentidos.
También hay algo de De niña a mujer. Tocotó recrea a una niña despreocupada, como debe ser. Y así lo transmite con el audio de cascos de caballos, la trotona base onírica y el final hablado de ella siendo niña en este corte radiante.
Y casi sin ganchos. Pocos vamos a encontrar en el disco. Daniel 2000 y Drummie, que son quienes se llevan el gato al agua (junto a un gran número de autores -hasta nueve aparecen en algún corte-), se preocupan, con Amaia, de melodías y letras antes que de petarlo en TikTok. Los temas se benefician de lo mejor de épocas pasadas y de hoy. Esto es arte, no mercadeo.
'La bienque' sale en dos cortes, uno el inesperado éxito old school Tengo un pensamiento. LBQ flojea, quizá Ana debiera mirar hacia Amaia para reencontrarse. Y ojalá Leire Martínez. Teo Planell también sale. Algo de Abraxas vive en el fondo de C'est la vie.
Nanai puede ser la mejor producción del álbum pero no encuentra su corazón. Al contrario que M.A.P.S., donde Romero da un salto de madurez respecto a Tocotó... con menos chispa técnica.
Fantasma y Ya está son los doppelgängers de Tocotó y Visión. Cierres de exquisitos arreglos e instrumentalización, de nuevo de BSO soñada, a la altura de la obertura, en uno de los largos del año.
https://www.youtube.com/watch?v=DPzZSBIObHI
#popazo #music #musica #pop #nowplaying #amaia #nanai #siabrolosojosnoesreal #disco #album #lp -
Arduino and AY-3-8910 – Part 3
I suggested in Part 2 that it might be possible to do some simple modulation of the amplitude of the AY-3-8910 channels rather than drive frequencies directly. This is taking a look at the possibilities of some kind of lo-fi direct digital synthesis using that as a basis.
- Part 1 – Getting started and looking at playing YM files.
- Part 2 – Adding basic MIDI control.
- Part 3 – Basic experiments with direct digital synthesis.
- Part 4 – Using the AY-3-8910 as a 4-bit DAC for Mozzi.
- Part 5 – Driving four AY-3-8910s using my AY-3-8910 Experimenter PCB.
https://makertube.net/w/uCSiBG5RBufGqspoHMYFPt
Warning! I strongly recommend using old or second hand equipment for your experiments. I am not responsible for any damage to expensive instruments!
These are the key tutorials for the main concepts used in this project:
- Arduino AY3891x Library: https://github.com/Andy4495/AY3891x
- Arduino Nano AY-3-8910 PCB: https://github.com/GadgetReboot/AY-3-8910
- AY-3-8910 on synth DIY wiki: https://sdiy.info/wiki/General_Instrument_AY-3-8910
If you are new to Arduino, see the Getting Started pages.
Parts list
- Arduino Uno.
- AY-3-8910 chip.
- Either GadgetReboot’s PCB or patch using solderless breadboard or prototyping boards.
- 5V compatible MIDI interface.
- Jumper wires.
Direct Digital Synthesis on the AY-3-8910
I’ve talked about direct digital synthesis before, so won’t go into full detail again. For more, see Arduino R2R Digital Audio – Part 3 and Arduino PWM Sound Output.
But the top-level idea is to set the level of the signal according to a value in a wavetable. If this value is updated at a useful audio rate then it will be interpreted as sound.
There are some pretty major limitations with attempting to do this on the AY-3-8910 however. The biggest one being that there are only 15 levels for the output on each channel.
So I’ll be working to the following properties:
- 4-bit resolution for the output.
- 8-bit wavetable.
- 8.8 fixed point accumulator to index into the wavetable.
- 8096 Hz sample rate.
YouTuber https://www.youtube.com/@inazumadenki5588 had a look at this and showed that the AY-3-8910 needs to be set up as follows:
- Frequency value for the channel should be set to the highest frequency possible.
- All channels should be disabled.
This is due to comments in the datasheet stating that the only way to fully disable a channel is to have 0 in the amplitude field.
Note: for a 8192 sample rate, that means writing out a sample to the AY-3-8910 registers approximately once every 124uS. With a 256 value wavetable, it takes almost 32 mS to write a complete cycle at the native sample rate, which would be around a 30 Hz output.
I’m not sure what the largest increment that would still give a useful signal might be, but say it was 8 values from the wavetable, then that would make the highest frequency supported around 1kHz. Not great, but certainly audible, so worth a try.
Setting up for DDS
I want a regular, reliable, periodic routine to output the levels from the wavetable, and the usual way to achieve this is using a timer and interrupt. As Timer 1 is already in use to generate the 1MHz clock for the AY-3-8910, I’m going to be configuring Timer 2 as follows:
- Timer 2 is an 8-bit timer.
- Use prescalar of 32 which gives a 500kHz clock source (16MHz/32).
- Use CTC (clear timer on compare) mode.
- Generate a compare match interrupt.
- Do not enable any output pins.
The appropriate ATMega328 registers to enable this are:
// COM2A[1:0] = 00 No output
// WGM2[2:0] = 010 CTC mode
// CS2[2:0] = 011 Prescalar=32
ASSR = 0;
TCCR2A = _BV(WGM21);
TCCR2B = _BV(CS21) | _BV(CS20);
TCNT2 = 0;
OCR2A = 60;
TIMSK2 = _BV(OCIE2A);Although it is worth noting that enabling OC1A can be quite useful for debugging. The following toggles the OC2A output (on D11) every time there is a compare match. The frequency seen on D11 will thus be half the anticipated sample frequency.
pinMode(11, OUTPUT);
TCCR2A |= _BV(COM2A0); // COM2A[1:0] = 01 for OC2A toggleAnd this does indeed generate a signal. Here is a trace showing a timing GPIO pin and the AY-3-8910 output.
The problem is that this is meant to be a 440Hz sine wave, and whilst the shape isn’t too bad (it is a little distorted as the amplitude isn’t a true linear shape), the frequency is much nearer 100Hz than 440.
Analysis of Performance
The clue is the other trace, which is a timing pin being toggled every time the Interrupt routine is called. This is showing a 1kHz frequency, which means the IRS is being called with a 2kHz frequency rather than the anticipated 8192Hz. Curiously though I am getting an accurate 4kHz toggle on the timer output pin OC1A indicating the timer is correctly counting with a 8kHz frequency.
No matter how I configured things, the interrupt routine just would not do anything at a faster rate. I had to drop the frequency right down to 2kHz to get the output pin and interrupt routing running together. This means that something in the interrupt routine seems to be taking ~ 450uS to run.
After a fair bit of prodding and probing and checking the ATMega328 datasheet and double checking the register values, I have to conclude that the AY3891x library is just too slow at updating the registers for it to be able to run from the interrupt routine at this speed.
Taking a look at the register write() function in the library, which I need to use to update the channel level, I can see the following is happening:
void AY3891x::write(byte regAddr, byte data) {
latchAddressMode(regAddr);
daPinsOutput(data);
noInterrupts();
mode010to110();
mode110to010();
interrupts();
daPinsInput();
}
void AY3891x::latchAddressMode(byte regAddr) {
mode010to000();
daPinsOutput(_chipAddress | regAddr); // Register address is 4 lsb
mode000to001();
mode001to000();
mode000to010();
}
void AY3891x::daPinsOutput(byte data) {
byte i;
for (i = 0; i < NUM_DA_LINES; i++) {
if (_DA_pin[i] != NO_PIN) pinMode(_DA_pin[i], OUTPUT);
}
for (i = 0; i < NUM_DA_LINES; i++) {
if (_DA_pin[i] != NO_PIN) {
digitalWrite(_DA_pin[i], data & 0x01);
data = data >> 1;
}
}
}
void AY3891x::daPinsInput() {
byte i;
for (i = 0; i < NUM_DA_LINES; i++) {
if (_DA_pin[i] != NO_PIN) pinMode(_DA_pin[i], INPUT);
}
}And every one of those modeXXXtoYYY() functions is a call to digitalWrite(), so I make that 22 calls to ditigalWrite() in order to write a single register value, plus around 16 calls to pinMode(). There are also 5 loops each looping over 8 values.
One person measured the Arduino Uno digitalWrite() function and concluded that it takes 3.4uS to run, so that is a minimum of 75uS of processing in every run through the interrupt routine just for those calls alone. That doesn’t include the calls and other logic going on. It could easily be more than twice that when everything is taken into account.
Dropping in some temporary pin IO either side of the call to the AY write function itself, and I’m measuring just over 250uS for the register update to happen, and that is just for one channel. This means that anything with a period of that or faster is starving the processor from running at all.
Measuring the Basic Performance
At this point I took a step back and created a free-running test sketch to really see what is going on.
#include "AY3891x.h"
AY3891x psg( 17, 8, 7, 6, 5, 4, 3, 2, 16, 15, 14);
#define AY_CLOCK 9 // D9
void aySetup () {
pinMode(AY_CLOCK, OUTPUT);
digitalWrite(AY_CLOCK, LOW);
TCCR1A = (1 << COM1A0);
TCCR1B = (1 << WGM12) | (1 << CS10);
TCCR1C = 0;
TIMSK1 = 0;
OCR1AH = 0;
OCR1AL = 7; // 16MHz / 8 = 2MHz Counter
psg.begin();
// Output highest frequency on each channel, but set level to 0
// Highest freq = 1000000 / (16 * 1) = 62500
psg.write(AY3891x::ChA_Amplitude, 0);
psg.write(AY3891x::ChA_Tone_Period_Coarse_Reg, 0);
psg.write(AY3891x::ChA_Tone_Period_Fine_Reg, 0);
psg.write(AY3891x::ChB_Amplitude, 0);
psg.write(AY3891x::ChB_Tone_Period_Coarse_Reg, 0);
psg.write(AY3891x::ChB_Tone_Period_Fine_Reg, 0);
psg.write(AY3891x::ChC_Amplitude, 0);
psg.write(AY3891x::ChC_Tone_Period_Coarse_Reg, 0);
psg.write(AY3891x::ChC_Tone_Period_Fine_Reg, 0);
// LOW = channel is in the mix.
// Turn everything off..
psg.write(AY3891x::Enable_Reg, 0xFF);
}
int toggle;
void setup() {
pinMode(11, OUTPUT);
toggle = LOW;
digitalWrite(11, toggle);
aySetup();
}
void loop() {
toggle = !toggle;
digitalWrite(11, toggle);
for (int i=0; i<16; i++) {
psg.write(AY3891x::ChA_Amplitude, i);
}
}All this is doing is continually writing 0 to 15 to the channel A level register whilst toggling a GPIO pin. Putting an oscilloscope trace on the IO pin and the AY-3-8910 channel A output gives me the following:
This is running with a period of 6.96mS, meaning each cycle of 16 writes takes 3.5mS, giving me almost 220uS per call to the AY write function which seems to align pretty well with what I was seeing before.
And this is generating an audible tone at around 280Hz, so regardless of any timer settings or waveform processing, this is going to be the baseline frequency on which everything else would have to rest, which isn’t great.
Optimising Register Writes
So at this point I have the choice of attempting to write to the AY-3-8910 myself using PORT IO to eliminate the time it takes for all those loops and digitalWrite() calls. Or I could try some alternative libraries.
The library I’m using aims for the most portable compatibility: “This library uses the generic
digitalWrite()function instead of direct port manipulation, and should therefore work across most, if not all, processors supported by Arduino, so long as enough I/O pins are available for the interface to the PSG.”It is a deliberate design choice, but does require all three bus control signals to be used: BDIR, BC1, BC2.
Alternatives are possible with less pin state changes, but much stricter timing requirements. Some options include:
- https://github.com/53175ddd/AY-3-8910_Arduino – uses a mixture of PORT IO and digitalWrite(). Assumes use of D0-D7 for data channel.
The following are projects that have not used a library, but just done their own thing:
- https://github.com/internalregister/AY-3-8910 – uses a mixture of digitalWrite and PORT IO. Assumes use of D0-D7 for the data channel.
- https://github.com/GaryA/TB-AY-3_MIDI – uses direct PORT IO for D2-D9
Unfortunately none of these really solves the problem as the PCB I’m using does not neatly map onto IO ports to allow the use of direct PORT IO for the data.
So to improve things whilst using this same PCB will require me to re-write the library myself.
As a test however, it is possible to take the IO pin definitions used with the PCB and write a bespoke, optimised register write routine as follows:
void ayFastWrite (byte reg, byte val) {
// Mode=Addr Latch
digitalWrite(BC1, HIGH);
digitalWrite(BDIR, HIGH);
// Latch address
// NB: Addresses are all in range 0..15 so don't need to
// worry about writing out bits 6,7 - just ensure set to zero
PORTD = (PORTD & 0x03) | ((reg & 0xCF)<<2);
PORTB = (PORTB & 0xFE);
PORTC = (PORTC & 0xF7);
// Mode = Inactive
digitalWrite(BC1, LOW);
digitalWrite(BDIR, LOW);
delayMicroseconds(10);
// Mode = Write
digitalWrite(BC1, LOW);
digitalWrite(BDIR, HIGH);
// Write data
PORTD = (PORTD & 0x03) | ((val & 0xCF)<<2); // Shift bits 0:5 to 2:7
PORTB = (PORTB & 0xFE) | ((val & 0x40)>>6); // Shift bit 6 to 0
PORTC = (PORTC & 0xF7) | ((val & 0x80)>>4); // Shift bit 7 to 3
// Mode = Inactive
digitalWrite(BC1, LOW);
digitalWrite(BDIR, LOW);
}I’m using the following mapping of data pins to Arduino digital IO pins to PORTS:
DA0-DA5D2-D7PORTD Bits 0-5DA6D8PORT B Bit 0DA7A3/D17PORT C Bit 3To make this happen I have to ensure that the right bits are set to OUTPUTs and that BC2 is held HIGH prior to using the fastWrite function.
digitalWrite(BC2, HIGH);
DDRD |= 0xFC;
DDRC |= 0x04;
DDRB |= 0x01;This now improves on that previous 280Hz and gives me 1600Hz performance.
So can I do any better? Well there are still between 6 and 8 calls to digitalWrite going on to handle the control signals…
#define BC1LOW {PORTC &= 0xFE;} // A0 LOW
#define BC1HIGH {PORTC |= 0x01;} // A0 HIGH
#define BC2LOW {PORTC &= 0xFD;} // A1 LOW
#define BC2HIGH {PORTC |= 0x02;} // A1 HIGH
#define BDIRLOW {PORTC &= 0xFB;} // A2 LOW
#define BDIRHIGH {PORTC |= 0x04;} // A2 HIGH
void ayFastWrite (byte reg, byte val) {
// Mode=Addr Latch
BC1HIGH;
BDIRHIGH;
// Latch address
PORTD = (PORTD & 0x03) | ((reg & 0xCF)<<2);
PORTB = (PORTB & 0xFE);
PORTC = (PORTC & 0xF7);
// Need 400nS Min
delayMicroseconds(1);
// Mode = Inactive
BC1LOW;
BDIRLOW;
// Need 100nS settle then 50nS preamble
delayMicroseconds(1);
// Mode = Write
BC1LOW;
BDIRHIGH;
// Write data
PORTD = (PORTD & 0x03) | ((val & 0xCF)<<2); // Shift bits 0:5 to 2:7
PORTB = (PORTB & 0xFE) | ((val & 0x40)>>6); // Shift bit 6 to 0
PORTC = (PORTC & 0xF7) | ((val & 0x80)>>4); // Shift bit 7 to 3
// Need 500nS min
delayMicroseconds(1);
// Mode = Inactive
BC1LOW;
BDIRLOW;
// Need 100nS min
}The timings come from the AY-3-8910 datasheet:
The actual minimum and maximum timings for the various “t” values are given in the preceeding table. Most have a minimum value, but tBD has to be noted: the “associative delay time” is 50nS. This means that any changing of BC1, BC2 and BDIR has to occur within 50nS to be considered part of the same action.
There is no means of having a nano-second delay (well, other than just spinning code), so I’ve just used a delayMicroseconds(1) here and there. This isn’t reliably accurate on an Arduino, but as I’m have delays of around half of that as a maximum it seems to be fine.
This now gives me the following:
This is now supporting a natural “as fast as possible” frequency of around 24kHz, meaning each call to the write function is now around 3uS. That is almost a 100x improvement over using all those pinMode and digitalWrite calls.
The downside of this method:
- It is ATMega328 specific.
- It is specific to the pin mappings and PORT usage of this PCB.
- It does not support reading or other chip operations between the writes.
It is also interesting to see that the traces also show the high frequency oscillation (62.5kHz) that is being modulated regardless of the channel frequency and enable settings.
DDS Part 2
Success! At least with a single channel. This is now playing a pretty well in tune 440Hz A.
Notice how the frequency of the timing pin is now ~4.2kHz meaning that the ISR is now indeed firing at the required 8192 Hz.
Here is a close-up of the output signal. The oscilloscope was struggling to get a clean frequency reading, but this is one time I caught it reading something close! I checked the sound itself with a tuning fork (see video). It is indeed 440Hz.
Closing Thoughts
I wanted to get something put together to allow me to drive a DSS wavetable over MIDI, with different waveforms, and so on, but it turned out to be a little more involved getting this far than I anticipated, so I’ll leave it here for now.
But hopefully filling in the gaps won’t take too long and will be the subject of a further post.
Now that I have something that works, I’m actually quite surprised by how well it is working.
Kevin
#arduinoNano #ay38910 #dds #define #directDigitalSynthesis #include #midi -
Arduino and AY-3-8910 – Part 3
I suggested in Part 2 that it might be possible to do some simple modulation of the amplitude of the AY-3-8910 channels rather than drive frequencies directly. This is taking a look at the possibilities of some kind of lo-fi direct digital synthesis using that as a basis.
- Part 1 – Getting started and looking at playing YM files.
- Part 2 – Adding basic MIDI control.
- Part 3 – Basic experiments with direct digital synthesis.
- Part 4 – Using the AY-3-8910 as a 4-bit DAC for Mozzi.
- Part 5 – Driving four AY-3-8910s using my AY-3-8910 Experimenter PCB.
https://makertube.net/w/uCSiBG5RBufGqspoHMYFPt
Warning! I strongly recommend using old or second hand equipment for your experiments. I am not responsible for any damage to expensive instruments!
These are the key tutorials for the main concepts used in this project:
- Arduino AY3891x Library: https://github.com/Andy4495/AY3891x
- Arduino Nano AY-3-8910 PCB: https://github.com/GadgetReboot/AY-3-8910
- AY-3-8910 on synth DIY wiki: https://sdiy.info/wiki/General_Instrument_AY-3-8910
If you are new to Arduino, see the Getting Started pages.
Parts list
- Arduino Uno.
- AY-3-8910 chip.
- Either GadgetReboot’s PCB or patch using solderless breadboard or prototyping boards.
- 5V compatible MIDI interface.
- Jumper wires.
Direct Digital Synthesis on the AY-3-8910
I’ve talked about direct digital synthesis before, so won’t go into full detail again. For more, see Arduino R2R Digital Audio – Part 3 and Arduino PWM Sound Output.
But the top-level idea is to set the level of the signal according to a value in a wavetable. If this value is updated at a useful audio rate then it will be interpreted as sound.
There are some pretty major limitations with attempting to do this on the AY-3-8910 however. The biggest one being that there are only 15 levels for the output on each channel.
So I’ll be working to the following properties:
- 4-bit resolution for the output.
- 8-bit wavetable.
- 8.8 fixed point accumulator to index into the wavetable.
- 8096 Hz sample rate.
YouTuber https://www.youtube.com/@inazumadenki5588 had a look at this and showed that the AY-3-8910 needs to be set up as follows:
- Frequency value for the channel should be set to the highest frequency possible.
- All channels should be disabled.
This is due to comments in the datasheet stating that the only way to fully disable a channel is to have 0 in the amplitude field.
Note: for a 8192 sample rate, that means writing out a sample to the AY-3-8910 registers approximately once every 124uS. With a 256 value wavetable, it takes almost 32 mS to write a complete cycle at the native sample rate, which would be around a 30 Hz output.
I’m not sure what the largest increment that would still give a useful signal might be, but say it was 8 values from the wavetable, then that would make the highest frequency supported around 1kHz. Not great, but certainly audible, so worth a try.
Setting up for DDS
I want a regular, reliable, periodic routine to output the levels from the wavetable, and the usual way to achieve this is using a timer and interrupt. As Timer 1 is already in use to generate the 1MHz clock for the AY-3-8910, I’m going to be configuring Timer 2 as follows:
- Timer 2 is an 8-bit timer.
- Use prescalar of 32 which gives a 500kHz clock source (16MHz/32).
- Use CTC (clear timer on compare) mode.
- Generate a compare match interrupt.
- Do not enable any output pins.
The appropriate ATMega328 registers to enable this are:
// COM2A[1:0] = 00 No output
// WGM2[2:0] = 010 CTC mode
// CS2[2:0] = 011 Prescalar=32
ASSR = 0;
TCCR2A = _BV(WGM21);
TCCR2B = _BV(CS21) | _BV(CS20);
TCNT2 = 0;
OCR2A = 60;
TIMSK2 = _BV(OCIE2A);Although it is worth noting that enabling OC1A can be quite useful for debugging. The following toggles the OC2A output (on D11) every time there is a compare match. The frequency seen on D11 will thus be half the anticipated sample frequency.
pinMode(11, OUTPUT);
TCCR2A |= _BV(COM2A0); // COM2A[1:0] = 01 for OC2A toggleAnd this does indeed generate a signal. Here is a trace showing a timing GPIO pin and the AY-3-8910 output.
The problem is that this is meant to be a 440Hz sine wave, and whilst the shape isn’t too bad (it is a little distorted as the amplitude isn’t a true linear shape), the frequency is much nearer 100Hz than 440.
Analysis of Performance
The clue is the other trace, which is a timing pin being toggled every time the Interrupt routine is called. This is showing a 1kHz frequency, which means the IRS is being called with a 2kHz frequency rather than the anticipated 8192Hz. Curiously though I am getting an accurate 4kHz toggle on the timer output pin OC1A indicating the timer is correctly counting with a 8kHz frequency.
No matter how I configured things, the interrupt routine just would not do anything at a faster rate. I had to drop the frequency right down to 2kHz to get the output pin and interrupt routing running together. This means that something in the interrupt routine seems to be taking ~ 450uS to run.
After a fair bit of prodding and probing and checking the ATMega328 datasheet and double checking the register values, I have to conclude that the AY3891x library is just too slow at updating the registers for it to be able to run from the interrupt routine at this speed.
Taking a look at the register write() function in the library, which I need to use to update the channel level, I can see the following is happening:
void AY3891x::write(byte regAddr, byte data) {
latchAddressMode(regAddr);
daPinsOutput(data);
noInterrupts();
mode010to110();
mode110to010();
interrupts();
daPinsInput();
}
void AY3891x::latchAddressMode(byte regAddr) {
mode010to000();
daPinsOutput(_chipAddress | regAddr); // Register address is 4 lsb
mode000to001();
mode001to000();
mode000to010();
}
void AY3891x::daPinsOutput(byte data) {
byte i;
for (i = 0; i < NUM_DA_LINES; i++) {
if (_DA_pin[i] != NO_PIN) pinMode(_DA_pin[i], OUTPUT);
}
for (i = 0; i < NUM_DA_LINES; i++) {
if (_DA_pin[i] != NO_PIN) {
digitalWrite(_DA_pin[i], data & 0x01);
data = data >> 1;
}
}
}
void AY3891x::daPinsInput() {
byte i;
for (i = 0; i < NUM_DA_LINES; i++) {
if (_DA_pin[i] != NO_PIN) pinMode(_DA_pin[i], INPUT);
}
}And every one of those modeXXXtoYYY() functions is a call to digitalWrite(), so I make that 22 calls to ditigalWrite() in order to write a single register value, plus around 16 calls to pinMode(). There are also 5 loops each looping over 8 values.
One person measured the Arduino Uno digitalWrite() function and concluded that it takes 3.4uS to run, so that is a minimum of 75uS of processing in every run through the interrupt routine just for those calls alone. That doesn’t include the calls and other logic going on. It could easily be more than twice that when everything is taken into account.
Dropping in some temporary pin IO either side of the call to the AY write function itself, and I’m measuring just over 250uS for the register update to happen, and that is just for one channel. This means that anything with a period of that or faster is starving the processor from running at all.
Measuring the Basic Performance
At this point I took a step back and created a free-running test sketch to really see what is going on.
#include "AY3891x.h"
AY3891x psg( 17, 8, 7, 6, 5, 4, 3, 2, 16, 15, 14);
#define AY_CLOCK 9 // D9
void aySetup () {
pinMode(AY_CLOCK, OUTPUT);
digitalWrite(AY_CLOCK, LOW);
TCCR1A = (1 << COM1A0);
TCCR1B = (1 << WGM12) | (1 << CS10);
TCCR1C = 0;
TIMSK1 = 0;
OCR1AH = 0;
OCR1AL = 7; // 16MHz / 8 = 2MHz Counter
psg.begin();
// Output highest frequency on each channel, but set level to 0
// Highest freq = 1000000 / (16 * 1) = 62500
psg.write(AY3891x::ChA_Amplitude, 0);
psg.write(AY3891x::ChA_Tone_Period_Coarse_Reg, 0);
psg.write(AY3891x::ChA_Tone_Period_Fine_Reg, 0);
psg.write(AY3891x::ChB_Amplitude, 0);
psg.write(AY3891x::ChB_Tone_Period_Coarse_Reg, 0);
psg.write(AY3891x::ChB_Tone_Period_Fine_Reg, 0);
psg.write(AY3891x::ChC_Amplitude, 0);
psg.write(AY3891x::ChC_Tone_Period_Coarse_Reg, 0);
psg.write(AY3891x::ChC_Tone_Period_Fine_Reg, 0);
// LOW = channel is in the mix.
// Turn everything off..
psg.write(AY3891x::Enable_Reg, 0xFF);
}
int toggle;
void setup() {
pinMode(11, OUTPUT);
toggle = LOW;
digitalWrite(11, toggle);
aySetup();
}
void loop() {
toggle = !toggle;
digitalWrite(11, toggle);
for (int i=0; i<16; i++) {
psg.write(AY3891x::ChA_Amplitude, i);
}
}All this is doing is continually writing 0 to 15 to the channel A level register whilst toggling a GPIO pin. Putting an oscilloscope trace on the IO pin and the AY-3-8910 channel A output gives me the following:
This is running with a period of 6.96mS, meaning each cycle of 16 writes takes 3.5mS, giving me almost 220uS per call to the AY write function which seems to align pretty well with what I was seeing before.
And this is generating an audible tone at around 280Hz, so regardless of any timer settings or waveform processing, this is going to be the baseline frequency on which everything else would have to rest, which isn’t great.
Optimising Register Writes
So at this point I have the choice of attempting to write to the AY-3-8910 myself using PORT IO to eliminate the time it takes for all those loops and digitalWrite() calls. Or I could try some alternative libraries.
The library I’m using aims for the most portable compatibility: “This library uses the generic
digitalWrite()function instead of direct port manipulation, and should therefore work across most, if not all, processors supported by Arduino, so long as enough I/O pins are available for the interface to the PSG.”It is a deliberate design choice, but does require all three bus control signals to be used: BDIR, BC1, BC2.
Alternatives are possible with less pin state changes, but much stricter timing requirements. Some options include:
- https://github.com/53175ddd/AY-3-8910_Arduino – uses a mixture of PORT IO and digitalWrite(). Assumes use of D0-D7 for data channel.
The following are projects that have not used a library, but just done their own thing:
- https://github.com/internalregister/AY-3-8910 – uses a mixture of digitalWrite and PORT IO. Assumes use of D0-D7 for the data channel.
- https://github.com/GaryA/TB-AY-3_MIDI – uses direct PORT IO for D2-D9
Unfortunately none of these really solves the problem as the PCB I’m using does not neatly map onto IO ports to allow the use of direct PORT IO for the data.
So to improve things whilst using this same PCB will require me to re-write the library myself.
As a test however, it is possible to take the IO pin definitions used with the PCB and write a bespoke, optimised register write routine as follows:
void ayFastWrite (byte reg, byte val) {
// Mode=Addr Latch
digitalWrite(BC1, HIGH);
digitalWrite(BDIR, HIGH);
// Latch address
// NB: Addresses are all in range 0..15 so don't need to
// worry about writing out bits 6,7 - just ensure set to zero
PORTD = (PORTD & 0x03) | ((reg & 0xCF)<<2);
PORTB = (PORTB & 0xFE);
PORTC = (PORTC & 0xF7);
// Mode = Inactive
digitalWrite(BC1, LOW);
digitalWrite(BDIR, LOW);
delayMicroseconds(10);
// Mode = Write
digitalWrite(BC1, LOW);
digitalWrite(BDIR, HIGH);
// Write data
PORTD = (PORTD & 0x03) | ((val & 0xCF)<<2); // Shift bits 0:5 to 2:7
PORTB = (PORTB & 0xFE) | ((val & 0x40)>>6); // Shift bit 6 to 0
PORTC = (PORTC & 0xF7) | ((val & 0x80)>>4); // Shift bit 7 to 3
// Mode = Inactive
digitalWrite(BC1, LOW);
digitalWrite(BDIR, LOW);
}I’m using the following mapping of data pins to Arduino digital IO pins to PORTS:
DA0-DA5D2-D7PORTD Bits 0-5DA6D8PORT B Bit 0DA7A3/D17PORT C Bit 3To make this happen I have to ensure that the right bits are set to OUTPUTs and that BC2 is held HIGH prior to using the fastWrite function.
digitalWrite(BC2, HIGH);
DDRD |= 0xFC;
DDRC |= 0x04;
DDRB |= 0x01;This now improves on that previous 280Hz and gives me 1600Hz performance.
So can I do any better? Well there are still between 6 and 8 calls to digitalWrite going on to handle the control signals…
#define BC1LOW {PORTC &= 0xFE;} // A0 LOW
#define BC1HIGH {PORTC |= 0x01;} // A0 HIGH
#define BC2LOW {PORTC &= 0xFD;} // A1 LOW
#define BC2HIGH {PORTC |= 0x02;} // A1 HIGH
#define BDIRLOW {PORTC &= 0xF7;} // A2 LOW
#define BDIRHIGH {PORTC |= 0x04;} // A2 HIGH
void ayFastWrite (byte reg, byte val) {
// Mode=Addr Latch
BC1HIGH;
BDIRHIGH;
// Latch address
PORTD = (PORTD & 0x03) | ((reg & 0xCF)<<2);
PORTB = (PORTB & 0xFE);
PORTC = (PORTC & 0xF7);
// Need 400nS Min
delayMicroseconds(1);
// Mode = Inactive
BC1LOW;
BDIRLOW;
// Need 100nS settle then 50nS preamble
delayMicroseconds(1);
// Mode = Write
BC1LOW;
BDIRHIGH;
// Write data
PORTD = (PORTD & 0x03) | ((val & 0xCF)<<2); // Shift bits 0:5 to 2:7
PORTB = (PORTB & 0xFE) | ((val & 0x40)>>6); // Shift bit 6 to 0
PORTC = (PORTC & 0xF7) | ((val & 0x80)>>4); // Shift bit 7 to 3
// Need 500nS min
delayMicroseconds(1);
// Mode = Inactive
BC1LOW;
BDIRLOW;
// Need 100nS min
}The timings come from the AY-3-8910 datasheet:
The actual minimum and maximum timings for the various “t” values are given in the preceeding table. Most have a minimum value, but tBD has to be noted: the “associative delay time” is 50nS. This means that any changing of BC1, BC2 and BDIR has to occur within 50nS to be considered part of the same action.
There is no means of having a nano-second delay (well, other than just spinning code), so I’ve just used a delayMicroseconds(1) here and there. This isn’t reliably accurate on an Arduino, but as I’m have delays of around half of that as a maximum it seems to be fine.
This now gives me the following:
This is now supporting a natural “as fast as possible” frequency of around 24kHz, meaning each call to the write function is now around 3uS. That is almost a 100x improvement over using all those pinMode and digitalWrite calls.
The downside of this method:
- It is ATMega328 specific.
- It is specific to the pin mappings and PORT usage of this PCB.
- It does not support reading or other chip operations between the writes.
It is also interesting to see that the traces also show the high frequency oscillation (62.5kHz) that is being modulated regardless of the channel frequency and enable settings.
DDS Part 2
Success! At least with a single channel. This is now playing a pretty well in tune 440Hz A.
Notice how the frequency of the timing pin is now ~4.2kHz meaning that the ISR is now indeed firing at the required 8192 Hz.
Here is a close-up of the output signal. The oscilloscope was struggling to get a clean frequency reading, but this is one time I caught it reading something close! I checked the sound itself with a tuning fork (see video). It is indeed 440Hz.
Closing Thoughts
I wanted to get something put together to allow me to drive a DSS wavetable over MIDI, with different waveforms, and so on, but it turned out to be a little more involved getting this far than I anticipated, so I’ll leave it here for now.
But hopefully filling in the gaps won’t take too long and will be the subject of a further post.
Now that I have something that works, I’m actually quite surprised by how well it is working.
Kevin
#arduinoNano #ay38910 #dds #define #directDigitalSynthesis #include #midi
-
Arduino and AY-3-8910 – Part 3
I suggested in Part 2 that it might be possible to do some simple modulation of the amplitude of the AY-3-8910 channels rather than drive frequencies directly. This is taking a look at the possibilities of some kind of lo-fi direct digital synthesis using that as a basis.
- Part 1 – Getting started and looking at playing YM files.
- Part 2 – Adding basic MIDI control.
- Part 3 – Basic experiments with direct digital synthesis.
- Part 4 – Using the AY-3-8910 as a 4-bit DAC for Mozzi.
- Part 5 – Driving four AY-3-8910s using my AY-3-8910 Experimenter PCB.
https://makertube.net/w/uCSiBG5RBufGqspoHMYFPt
Warning! I strongly recommend using old or second hand equipment for your experiments. I am not responsible for any damage to expensive instruments!
These are the key tutorials for the main concepts used in this project:
- Arduino AY3891x Library: https://github.com/Andy4495/AY3891x
- Arduino Nano AY-3-8910 PCB: https://github.com/GadgetReboot/AY-3-8910
- AY-3-8910 on synth DIY wiki: https://sdiy.info/wiki/General_Instrument_AY-3-8910
If you are new to Arduino, see the Getting Started pages.
Parts list
- Arduino Uno.
- AY-3-8910 chip.
- Either GadgetReboot’s PCB or patch using solderless breadboard or prototyping boards.
- 5V compatible MIDI interface.
- Jumper wires.
Direct Digital Synthesis on the AY-3-8910
I’ve talked about direct digital synthesis before, so won’t go into full detail again. For more, see Arduino R2R Digital Audio – Part 3 and Arduino PWM Sound Output.
But the top-level idea is to set the level of the signal according to a value in a wavetable. If this value is updated at a useful audio rate then it will be interpreted as sound.
There are some pretty major limitations with attempting to do this on the AY-3-8910 however. The biggest one being that there are only 15 levels for the output on each channel.
So I’ll be working to the following properties:
- 4-bit resolution for the output.
- 8-bit wavetable.
- 8.8 fixed point accumulator to index into the wavetable.
- 8096 Hz sample rate.
YouTuber https://www.youtube.com/@inazumadenki5588 had a look at this and showed that the AY-3-8910 needs to be set up as follows:
- Frequency value for the channel should be set to the highest frequency possible.
- All channels should be disabled.
This is due to comments in the datasheet stating that the only way to fully disable a channel is to have 0 in the amplitude field.
Note: for a 8192 sample rate, that means writing out a sample to the AY-3-8910 registers approximately once every 124uS. With a 256 value wavetable, it takes almost 32 mS to write a complete cycle at the native sample rate, which would be around a 30 Hz output.
I’m not sure what the largest increment that would still give a useful signal might be, but say it was 8 values from the wavetable, then that would make the highest frequency supported around 1kHz. Not great, but certainly audible, so worth a try.
Setting up for DDS
I want a regular, reliable, periodic routine to output the levels from the wavetable, and the usual way to achieve this is using a timer and interrupt. As Timer 1 is already in use to generate the 1MHz clock for the AY-3-8910, I’m going to be configuring Timer 2 as follows:
- Timer 2 is an 8-bit timer.
- Use prescalar of 32 which gives a 500kHz clock source (16MHz/32).
- Use CTC (clear timer on compare) mode.
- Generate a compare match interrupt.
- Do not enable any output pins.
The appropriate ATMega328 registers to enable this are:
// COM2A[1:0] = 00 No output
// WGM2[2:0] = 010 CTC mode
// CS2[2:0] = 011 Prescalar=32
ASSR = 0;
TCCR2A = _BV(WGM21);
TCCR2B = _BV(CS21) | _BV(CS20);
TCNT2 = 0;
OCR2A = 60;
TIMSK2 = _BV(OCIE2A);Although it is worth noting that enabling OC1A can be quite useful for debugging. The following toggles the OC2A output (on D11) every time there is a compare match. The frequency seen on D11 will thus be half the anticipated sample frequency.
pinMode(11, OUTPUT);
TCCR2A |= _BV(COM2A0); // COM2A[1:0] = 01 for OC2A toggleAnd this does indeed generate a signal. Here is a trace showing a timing GPIO pin and the AY-3-8910 output.
The problem is that this is meant to be a 440Hz sine wave, and whilst the shape isn’t too bad (it is a little distorted as the amplitude isn’t a true linear shape), the frequency is much nearer 100Hz than 440.
Analysis of Performance
The clue is the other trace, which is a timing pin being toggled every time the Interrupt routine is called. This is showing a 1kHz frequency, which means the IRS is being called with a 2kHz frequency rather than the anticipated 8192Hz. Curiously though I am getting an accurate 4kHz toggle on the timer output pin OC1A indicating the timer is correctly counting with a 8kHz frequency.
No matter how I configured things, the interrupt routine just would not do anything at a faster rate. I had to drop the frequency right down to 2kHz to get the output pin and interrupt routing running together. This means that something in the interrupt routine seems to be taking ~ 450uS to run.
After a fair bit of prodding and probing and checking the ATMega328 datasheet and double checking the register values, I have to conclude that the AY3891x library is just too slow at updating the registers for it to be able to run from the interrupt routine at this speed.
Taking a look at the register write() function in the library, which I need to use to update the channel level, I can see the following is happening:
void AY3891x::write(byte regAddr, byte data) {
latchAddressMode(regAddr);
daPinsOutput(data);
noInterrupts();
mode010to110();
mode110to010();
interrupts();
daPinsInput();
}
void AY3891x::latchAddressMode(byte regAddr) {
mode010to000();
daPinsOutput(_chipAddress | regAddr); // Register address is 4 lsb
mode000to001();
mode001to000();
mode000to010();
}
void AY3891x::daPinsOutput(byte data) {
byte i;
for (i = 0; i < NUM_DA_LINES; i++) {
if (_DA_pin[i] != NO_PIN) pinMode(_DA_pin[i], OUTPUT);
}
for (i = 0; i < NUM_DA_LINES; i++) {
if (_DA_pin[i] != NO_PIN) {
digitalWrite(_DA_pin[i], data & 0x01);
data = data >> 1;
}
}
}
void AY3891x::daPinsInput() {
byte i;
for (i = 0; i < NUM_DA_LINES; i++) {
if (_DA_pin[i] != NO_PIN) pinMode(_DA_pin[i], INPUT);
}
}And every one of those modeXXXtoYYY() functions is a call to digitalWrite(), so I make that 22 calls to ditigalWrite() in order to write a single register value, plus around 16 calls to pinMode(). There are also 5 loops each looping over 8 values.
One person measured the Arduino Uno digitalWrite() function and concluded that it takes 3.4uS to run, so that is a minimum of 75uS of processing in every run through the interrupt routine just for those calls alone. That doesn’t include the calls and other logic going on. It could easily be more than twice that when everything is taken into account.
Dropping in some temporary pin IO either side of the call to the AY write function itself, and I’m measuring just over 250uS for the register update to happen, and that is just for one channel. This means that anything with a period of that or faster is starving the processor from running at all.
Measuring the Basic Performance
At this point I took a step back and created a free-running test sketch to really see what is going on.
#include "AY3891x.h"
AY3891x psg( 17, 8, 7, 6, 5, 4, 3, 2, 16, 15, 14);
#define AY_CLOCK 9 // D9
void aySetup () {
pinMode(AY_CLOCK, OUTPUT);
digitalWrite(AY_CLOCK, LOW);
TCCR1A = (1 << COM1A0);
TCCR1B = (1 << WGM12) | (1 << CS10);
TCCR1C = 0;
TIMSK1 = 0;
OCR1AH = 0;
OCR1AL = 7; // 16MHz / 8 = 2MHz Counter
psg.begin();
// Output highest frequency on each channel, but set level to 0
// Highest freq = 1000000 / (16 * 1) = 62500
psg.write(AY3891x::ChA_Amplitude, 0);
psg.write(AY3891x::ChA_Tone_Period_Coarse_Reg, 0);
psg.write(AY3891x::ChA_Tone_Period_Fine_Reg, 0);
psg.write(AY3891x::ChB_Amplitude, 0);
psg.write(AY3891x::ChB_Tone_Period_Coarse_Reg, 0);
psg.write(AY3891x::ChB_Tone_Period_Fine_Reg, 0);
psg.write(AY3891x::ChC_Amplitude, 0);
psg.write(AY3891x::ChC_Tone_Period_Coarse_Reg, 0);
psg.write(AY3891x::ChC_Tone_Period_Fine_Reg, 0);
// LOW = channel is in the mix.
// Turn everything off..
psg.write(AY3891x::Enable_Reg, 0xFF);
}
int toggle;
void setup() {
pinMode(11, OUTPUT);
toggle = LOW;
digitalWrite(11, toggle);
aySetup();
}
void loop() {
toggle = !toggle;
digitalWrite(11, toggle);
for (int i=0; i<16; i++) {
psg.write(AY3891x::ChA_Amplitude, i);
}
}All this is doing is continually writing 0 to 15 to the channel A level register whilst toggling a GPIO pin. Putting an oscilloscope trace on the IO pin and the AY-3-8910 channel A output gives me the following:
This is running with a period of 6.96mS, meaning each cycle of 16 writes takes 3.5mS, giving me almost 220uS per call to the AY write function which seems to align pretty well with what I was seeing before.
And this is generating an audible tone at around 280Hz, so regardless of any timer settings or waveform processing, this is going to be the baseline frequency on which everything else would have to rest, which isn’t great.
Optimising Register Writes
So at this point I have the choice of attempting to write to the AY-3-8910 myself using PORT IO to eliminate the time it takes for all those loops and digitalWrite() calls. Or I could try some alternative libraries.
The library I’m using aims for the most portable compatibility: “This library uses the generic
digitalWrite()function instead of direct port manipulation, and should therefore work across most, if not all, processors supported by Arduino, so long as enough I/O pins are available for the interface to the PSG.”It is a deliberate design choice, but does require all three bus control signals to be used: BDIR, BC1, BC2.
Alternatives are possible with less pin state changes, but much stricter timing requirements. Some options include:
- https://github.com/53175ddd/AY-3-8910_Arduino – uses a mixture of PORT IO and digitalWrite(). Assumes use of D0-D7 for data channel.
The following are projects that have not used a library, but just done their own thing:
- https://github.com/internalregister/AY-3-8910 – uses a mixture of digitalWrite and PORT IO. Assumes use of D0-D7 for the data channel.
- https://github.com/GaryA/TB-AY-3_MIDI – uses direct PORT IO for D2-D9
Unfortunately none of these really solves the problem as the PCB I’m using does not neatly map onto IO ports to allow the use of direct PORT IO for the data.
So to improve things whilst using this same PCB will require me to re-write the library myself.
As a test however, it is possible to take the IO pin definitions used with the PCB and write a bespoke, optimised register write routine as follows:
void ayFastWrite (byte reg, byte val) {
// Mode=Addr Latch
digitalWrite(BC1, HIGH);
digitalWrite(BDIR, HIGH);
// Latch address
// NB: Addresses are all in range 0..15 so don't need to
// worry about writing out bits 6,7 - just ensure set to zero
PORTD = (PORTD & 0x03) | ((reg & 0xCF)<<2);
PORTB = (PORTB & 0xFE);
PORTC = (PORTC & 0xF7);
// Mode = Inactive
digitalWrite(BC1, LOW);
digitalWrite(BDIR, LOW);
delayMicroseconds(10);
// Mode = Write
digitalWrite(BC1, LOW);
digitalWrite(BDIR, HIGH);
// Write data
PORTD = (PORTD & 0x03) | ((val & 0xCF)<<2); // Shift bits 0:5 to 2:7
PORTB = (PORTB & 0xFE) | ((val & 0x40)>>6); // Shift bit 6 to 0
PORTC = (PORTC & 0xF7) | ((val & 0x80)>>4); // Shift bit 7 to 3
// Mode = Inactive
digitalWrite(BC1, LOW);
digitalWrite(BDIR, LOW);
}I’m using the following mapping of data pins to Arduino digital IO pins to PORTS:
DA0-DA5D2-D7PORTD Bits 0-5DA6D8PORT B Bit 0DA7A3/D17PORT C Bit 3To make this happen I have to ensure that the right bits are set to OUTPUTs and that BC2 is held HIGH prior to using the fastWrite function.
digitalWrite(BC2, HIGH);
DDRD |= 0xFC;
DDRC |= 0x04;
DDRB |= 0x01;This now improves on that previous 280Hz and gives me 1600Hz performance.
So can I do any better? Well there are still between 6 and 8 calls to digitalWrite going on to handle the control signals…
#define BC1LOW {PORTC &= 0xFE;} // A0 LOW
#define BC1HIGH {PORTC |= 0x01;} // A0 HIGH
#define BC2LOW {PORTC &= 0xFD;} // A1 LOW
#define BC2HIGH {PORTC |= 0x02;} // A1 HIGH
#define BDIRLOW {PORTC &= 0xF7;} // A2 LOW
#define BDIRHIGH {PORTC |= 0x04;} // A2 HIGH
void ayFastWrite (byte reg, byte val) {
// Mode=Addr Latch
BC1HIGH;
BDIRHIGH;
// Latch address
PORTD = (PORTD & 0x03) | ((reg & 0xCF)<<2);
PORTB = (PORTB & 0xFE);
PORTC = (PORTC & 0xF7);
// Need 400nS Min
delayMicroseconds(1);
// Mode = Inactive
BC1LOW;
BDIRLOW;
// Need 100nS settle then 50nS preamble
delayMicroseconds(1);
// Mode = Write
BC1LOW;
BDIRHIGH;
// Write data
PORTD = (PORTD & 0x03) | ((val & 0xCF)<<2); // Shift bits 0:5 to 2:7
PORTB = (PORTB & 0xFE) | ((val & 0x40)>>6); // Shift bit 6 to 0
PORTC = (PORTC & 0xF7) | ((val & 0x80)>>4); // Shift bit 7 to 3
// Need 500nS min
delayMicroseconds(1);
// Mode = Inactive
BC1LOW;
BDIRLOW;
// Need 100nS min
}The timings come from the AY-3-8910 datasheet:
The actual minimum and maximum timings for the various “t” values are given in the preceeding table. Most have a minimum value, but tBD has to be noted: the “associative delay time” is 50nS. This means that any changing of BC1, BC2 and BDIR has to occur within 50nS to be considered part of the same action.
There is no means of having a nano-second delay (well, other than just spinning code), so I’ve just used a delayMicroseconds(1) here and there. This isn’t reliably accurate on an Arduino, but as I’m have delays of around half of that as a maximum it seems to be fine.
This now gives me the following:
This is now supporting a natural “as fast as possible” frequency of around 24kHz, meaning each call to the write function is now around 3uS. That is almost a 100x improvement over using all those pinMode and digitalWrite calls.
The downside of this method:
- It is ATMega328 specific.
- It is specific to the pin mappings and PORT usage of this PCB.
- It does not support reading or other chip operations between the writes.
It is also interesting to see that the traces also show the high frequency oscillation (62.5kHz) that is being modulated regardless of the channel frequency and enable settings.
DDS Part 2
Success! At least with a single channel. This is now playing a pretty well in tune 440Hz A.
Notice how the frequency of the timing pin is now ~4.2kHz meaning that the ISR is now indeed firing at the required 8192 Hz.
Here is a close-up of the output signal. The oscilloscope was struggling to get a clean frequency reading, but this is one time I caught it reading something close! I checked the sound itself with a tuning fork (see video). It is indeed 440Hz.
Closing Thoughts
I wanted to get something put together to allow me to drive a DSS wavetable over MIDI, with different waveforms, and so on, but it turned out to be a little more involved getting this far than I anticipated, so I’ll leave it here for now.
But hopefully filling in the gaps won’t take too long and will be the subject of a further post.
Now that I have something that works, I’m actually quite surprised by how well it is working.
Kevin
#arduinoNano #ay38910 #dds #define #directDigitalSynthesis #include #midi
-
Where is Michael Jackson’s Chimpanzee Bubbles Now? Inside His ‘Peaceful’ Life and Why Filmmakers Used a CGI Chimp in ‘Michael’
#Variety #Columns #News #JustForVariety #Lionsgate #Michael #MichaelJackson #PETAhttps://variety.com/2026/film/columns/bubbles-chimpanzee-michael-jackson-cgi-chimp-movie-1236729758/
-
How #Guatemala, #Mexico, and #Belize plan to protect 14 million acres of #Mayan #Forest
Mexico, Guatemala and Belize have announced plans to create a huge reserve of tropical forest spanning across the three countries. Pushing out criminal gangs and protecting the land from ranchers, miners and loggers won’t be easy.
By Sonia Pérez D. And María Verza, Aug. 21, 2025
GUATEMALA CITY (AP) — "Mexico, Guatemala and Belize have announced plans to create a huge reserve of tropical forest spanning across the three countries. Pushing out criminal gangs and protecting the land from ranchers, miners and loggers won’t be easy.
The nature reserve announced last week and called the #GreatMayanJungleBioculturalCorridor would stretch across jungle areas of southern Mexico and northern parts of the two Central American nations, encompassing more than 14 million acres (5.7 million hectares). It would become the second largest reserve in the Americas, behind only the Amazon.
In interviews this week, the environment ministers of Mexico and Guatemala emphasized the need for security, while also expressing the intention of administrations in both countries to avoid destructive projects in the area." 'The first thing is that the security forces begin to have a presence,' because the region has been abandoned and left to organized crime, Guatemala Environment Minister Patricia Orantes said. 'This is not primarily an environmental battle. We’re talking about the Guatemalan state needing to retake control of its territory.'
"#Environmental groups have long said that the jungle on both sides of the Mexico-Guatemala border is dotted with clandestine landing strips for cocaine-laden planes, smugglers moving migrants north and illegal loggers.
"Mexico Environment Secretary Alicia Bárcena said that all three countries will need to boost their security presence in the reserve. 'We’re not going to protect the forest ourselves, the security secretary has to help, the army,' Bárcena said.
Communities as allies
"Just sending troops will likely be insufficient, as Mexico’s experience along another part of its southern border in Chiapas has shown. Organized crime has infiltrated economically-strapped communities with few options and it has been difficult to root them out.
"Guatemalan lawyer and environmental activist Rafael Maldonado said it will be vital 'to convert communities that are believed to participate in drug trafficking into allies of the park.'
"To do that, Orantes said the government must offer economic alternatives to those residents.
"One proposal from Mexico is the expansion of its '#PlantingLife' program, which offers landowners money to grow certain kinds of #trees either for #fruit or #timber. The program has a $2 billion budget, Bárcena said.
"But the program, which dates to ex-President Andrés Manuel López Obrador, has faced criticism. In 2021, the World Resources Institute reported that it had actually incentivized deforestation in Campeche state. Bárcena said the program is being adjusted to better meet environmental objectives.
"Mexican sustainability and climate action expert Juan Carlos Franco, who works in southern Mexico, said security is crucial and requires the government to act as 'guarantor.' But the work has to be carried out with civil society in the #LocalCommunities, including in places where locals have found ways to coexist with the illegal activity surrounding them, he said.
" 'Communities oriented toward the #biocultural management of the territory can overcome despite the crime, that’s the most revealing message,' he said.
"Another challenge will be holding governments over the long term to commitments to forgo big projects that promise economic development but threaten environmental damage, such as Mexico’s tourist rail operation, the Maya Train, which Belize is interested in extending to its territory.
"Orantes, the Guatemala minister, said that Guatemalan President Bernardo Arévalo would not allow megaprojects in the reserve because when access is opened in the forest it becomes difficult to control everything that follows.
"Arévalo recently declined to renew the contract of a #petroleum company that had been operating for 40 years in a Guatemalan reserve known as the #Maya Biosphere.
"Guatemala is making the largest land contribution to the reserve, encompassing 27 existing protected areas. Arévalo had already made clear that he would not run an extension of the Maya Train proposed by Mexico’s last president through protected areas.
In Mexico, Bárcena noted that the 950-mile (1,500-kilometer) train line, which started running in late 2023 and goes in a rough loop around the Yucatan Peninsula, lies outside the new reserve’s territory."She said her agency was working to alleviate some of the environmental impacts of the train line, in collaboration with companies operated by the Mexican Army, which built a large portion of the rail line and operates the train.
"To avoid destructive projects in the new reserve, the three governments agreed to create a council made up of environmental authorities, as well as an Indigenous advisory council, Bárcena said. Any proposed projects in the reserve would have to pass through them.
"Some Mexican activists, like Pedro Uc who lives in the Yucatan, remain skeptical of the government’s commitment to conservation considering the same political party that brought the Maya Train remains in power in Mexico. Others like Franco are willing to move ahead and keep the pressure on the three governments to maintain their commitments."
Archived version:
https://archive.ph/GyXR8#SolarPunkSunday #ForestsAreLife #ProtectTheForest #PreserveNature #CentralAmerica
-
Painting on paper, 20 x 20 cm: Ambiguous impulses for your mental cinema!
#kunst #contemporaryArt #mentalCinema #analogArt #painting #rubberStamp #reliefPrinting #saveBioDiversity #climateActionNow #systemChange #endFossilFuels #makeArtNotWar #noAFD #NoRacism #NoFascism #emblematy #laurelWreath #monkey #chimpanzee #smartphone #cellphone #mobilePhone #communication #skull #death #mementomori #vanitas #fragilitas #finiteness #mortality #despair #barbedWire #fence #border #territory #prison -
Uh-oh, KeePassXC is about to slurp the slop:
https://keepassxc.org/blog/2025-11-09-about-keepassxcs-code-quality-control/
Alternative: https://codeberg.org/keepasschi/ChiPass #riskcontrol #riskmanagement #risks -
SoftBank investiert Milliarden in Intel – US-Regierung erwägt Einstieg
Intel könnte schon bald einen bedeutenden Investor gewinnen: SoftBank investiert zwei Milliarden Dollar, während auch die US-Regierung über einen Einstieg nachdenkt. Das Unternehmen steht damit im Fo
https://www.apfeltalk.de/magazin/news/softbank-investiert-milliarden-in-intel-us-regierung-erwaegt-einstieg/
#News #Aktien #CHIPSAct #Halbleiter #Intel #Investition #LipBuTan #MasayoshiSon #Softbank #Trump #USRegierung -
Château de la Chipaudière à #SaintMalo (#IlleEtVilaine) La Chipaudière était à la famille Pépin au XVe siècle. L'actuel château a été construit de 1710 à 1720 et est l'une des plus belles malouinières du pays. ...
Suite 👉 https://monumentum.fr/monument-historique/pa00090803/saint-malo-chateau-de-la-chipaudiere
#Patrimoine #MonumentHistorique
Photo CC-BY-SA 4.0 : Halorache -
Jour 17 - L'oeil du chimpanzé.
Pastel sec. -
🍉 #Talleres anuales en las #bibliotecas 2025-2026 [Inscripciones]
🍉El regalo de compartir universo con #JaneGoodall: “Estar con ella significaba sentir que el futuro era posible”. “Tarzán se casó con la Jane equivocada”
🍉 #Conferencia sobre el proceso histórico de La #ermitaSantaMaríalaAntigua, uno de los más antiguos de #Madrid
🍉El último mitin de #Franco casi concluyó en matanza
https://carabanchel.net #VIDEOS
#Carabanchel #chimpancés #antropóloga #Clublectura #inscripcion #Tallercreaciónliteraria #Tertuliaseninglés -
Petite #rando à la mi-journée en Auvergne.
C'était en février et j'ai été agréablement surpris par cette boucle#randonnee #auvergne #balade #nature
https://sima78.chispa.fr/2026/05/13/s26e02-boucle-au-depart-de-st-maurice-es-allier-auvergne/
-
After more than two years in prison, #Tzeltal political prisoners accused of murdering a municipal policeman in 2022 still have no evidence to justify their incarceration👉 https://avispa.org/?p=117878 🐝
#Chiapas #PoliticalPrisoners #StopTheTorture #politicalprisoners #MumiaAbuJamal #mexico #chiapas #ezln #zapatista
-
♲ @[email protected]:On this day in 1973: “The First DEVO Concert”
by Gerald V. Casale
At #KentStateUniversity’s 1973 Creative Arts Festival, we were the “ #Sextet Devo ” Why was it a sextet? Because my college student best friend and early #Devo collaborator, Bob Lewis, was insistent that I couldn’t sing. He convinced us that having a crooning signer — who had sung with the James Gang ( #JoeWalsh) and with The Measles, a locally popular cover band — was the way to go. I didn’t buy it, and I was personally offended that he said I “couldn’t sing.”
But there was a more important and subversive reason for going along with the ploy. It allowed us the “Sextet” billing to qualify for a pretentiously curated arts #festival, sponsored yearly by the university gatekeepers. Clearly “Sextet #Devo” was “art,” and not Rock N Roll. So we slipped in with a vote from Dr. Robert Bertholf, a tenured English Literature professor (and all around cool, brainiac guy), who was sympathetic to our cause. And that cause — starting then — was spreading The Gospel Of #Devolution.
Our setlist was eclectic, to say the least, and ample evidence that Lewis and I had spent way too much time philosophizing — and convincing Mark #Mothersbaugh of the merits of the #De-evolution trope — and way too little time with songwriting.
On April 18th, #1973, our line-up was my brother #BobCasale and #BobLewis on guitars, myself on bass guitar and vocals (I prevailed and sang “Sun Come Up, Moon Go Down”), #FredWeber on lead vocals/tambourine, drummer #RodReisman, and #MarkMothersbaugh as #keyboardist.
The video that my good friend and colleague, #ChuckStatler, shot that night to document our nascent performance is interesting in the same way that the recently surfaced news footage of 11-year-old Prince supporting the teacher’s strike in Minneapolis is interesting. Looking back, it is important historical evidence of… something.
In front of an audience of 20 or so students, seated in a small auditorium and curious enough to check us out, we slugged through mid-tempo experimentation on songs like “Wiggle Worm,” “What Goes Up Must Come Down” (a relatively lively blues stomp by comparison), and a #folk-rock indulgence titled “River Run” that showcased #BobLewis’s #country-folk leanings.
All of that followed after Mark had played a solo #keyboard warmup intro while the meager audience trickled in. He plunked out tunes like “Here Comes Peter Cottontail,” and “Mr. Jingeling” which was a Northeast Ohio advertising jingle for Halle's department stores. (Their mascot character, named Mr. Jingeling, was a grotesque man in a Christmas elf-type suit who went from store to store enticing kids to come in with their parents to buy, buy, buy!)
The preamble that Mark provided was an excellent example of what we called “Low #Devo.” But for me, the rest of that set doesn’t matter much, in retrospect. However, at age 24, it did provide a painful lesson on an artist’s learning curve.
What did I learn?
(A) Sing your own songs.
(B) Don’t let others discourage you with doubt and fear.
(C) Practice, do more, and talk less.
The real highlight, though — given our critique of technology and of conformity culture — was classic Devo perfection. Mark’s #Minimoog malfunctioned, and it was stuck in a loop of sine wave #noise that swooped up in pitch like a warning alarm in a nuclear plant. He could only flip a switch and make it swoop down. And boy, that’s what he did for what seemed like an eternity, while we stood and watched. He kept putting his hand to his forehead, as if confused, and in pain. (Oh, did I mention that Mark was wearing a full-head chimpanzee mask for the entire set to hide his identity?)
As the “Dada” aspect of Mark’s broken #synthesizer disaster began to fatigue the audience, the other performers walked off stage and into the wings. But Mark and I refused to leave. Because our set wasn’t finished. And I can be heard in Statler’s video, yelling to a stage hand, “Hey! Go Get Those Guys!”
Mark’s improvised “Headache Solo" was Devolved genius, and the thing that still resonates with validity nearly half a century later.
©2022 GVC | GeraldVCasale.com/
Permalink to this story:
GeraldVCasale.com/pages/the-fi…
P.S. Witness historic video clip here:
yewtu.be/yslKp2DKe0I
P.P.S. Today, Bob Lewis admits: “The only reason for having Fred Weber was he was a ‘professional’ singer who fronted #theMeasles and sang with #WalshandtheJamesGang on occasion. In retrospect, an aberration.”
NOTE: #GeraldVCasale in the yellow plastic raincoat in the photo.
#protopunk #postpunk -
Durante el #8marzo2024, Madres en Resistencia denuncian que en el último año se registran 9 casos de desaparición y el gobierno no hace nada.
👉 https://avispa.org/?p=113270🐝
#desaparecidos #ddhh #8M2024 #TuxtlaGutiérrez #mexico #felizLunes #mujeres #feminismo #8m #chiapas
-
Neue Chips für #Raumfahrt und Quantenrechner: Fabrikausbau von #Globalfoundries #Dresden verbreitert auch das Produktionsprofil
https://oiger.de/2026/02/11/globalfoundries-dresden-haertet-chips-fuer-weltraum-und-quantenwelten/196440
#22FDX #Mikroelektronik #Weltraum-Chips #Quantentechnologie #Halbleiter #Sachsen #EU #ChipsAct #ECA #TSMC #Ausbau