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#aoc25 — Public Fediverse posts

Live and recent posts from across the Fediverse tagged #aoc25, aggregated by home.social.

  1. Kroppeb @[email protected] ·

    A strange package has arrived. Received for my outstanding performance on last year's #AdventOfCode. Except the year is wrong on the shirt :) I suppose it's a prediction for this year's event ;-p

    #Kotlin #Kodee #AoC25 #AoC26

    #adventofcode #kotlin #kodee #aoc25 #aoc26
  2. Kroppeb @[email protected] ·

    A strange package has arrived. Received for my outstanding performance on last year's #AdventOfCode. Except the year is wrong on the shirt :) I suppose it's a prediction for this year's event ;-p

    #Kotlin #Kodee #AoC25 #AoC26

    #adventofcode #kotlin #kodee #aoc25 #aoc26
  3. Kroppeb @[email protected] ·

    A strange package has arrived. Received for my outstanding performance on last year's #AdventOfCode. Except the year is wrong on the shirt :) I suppose it's a prediction for this year's event ;-p

    #Kotlin #Kodee #AoC25 #AoC26

    #aoc26 #aoc25 #kodee #kotlin #adventofcode
  4. Kroppeb @[email protected] ·

    A strange package has arrived. Received for my outstanding performance on last year's #AdventOfCode. Except the year is wrong on the shirt :) I suppose it's a prediction for this year's event ;-p

    #Kotlin #Kodee #AoC25 #AoC26

    #adventofcode #kotlin #kodee #aoc25 #aoc26
  5. PipelineC @pipelinec ·

    Advent of Code Day 5: Iterates over RAM holding fresh ID ranges. Autopipeline checks N IDs against M ranges each cycle. Easily does N=3,M=2 at ~235MHz, ~1.4 billion ID-in-range checks computed per sec 😎

    github.com/JulianKemmerer/Pipe

    #aoc25 #fpga #hardware #verilog #vhdl #hdl
  6. PipelineC @[email protected] ·

    Advent of Code Day 5: Iterates over RAM holding fresh ID ranges. Autopipeline checks N IDs against M ranges each cycle. Easily does N=3,M=2 at ~235MHz, ~1.4 billion ID-in-range checks computed per sec 😎

    github.com/JulianKemmerer/Pipe

    #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    #aoc25 #fpga #hardware #verilog #vhdl #hdl
  7. PipelineC @[email protected] ·

    Advent of Code Day 5: Iterates over RAM holding fresh ID ranges. Autopipeline checks N IDs against M ranges each cycle. Easily does N=3,M=2 at ~235MHz, ~1.4 billion ID-in-range checks computed per sec 😎

    github.com/JulianKemmerer/Pipe

    #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    #eda #asic #hls #rtl #hdl #vhdl
  8. PipelineC @[email protected] ·

    Advent of Code Day 5: Iterates over RAM holding fresh ID ranges. Autopipeline checks N IDs against M ranges each cycle. Easily does N=3,M=2 at ~235MHz, ~1.4 billion ID-in-range checks computed per sec 😎

    github.com/JulianKemmerer/Pipe

    #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    #aoc25 #fpga #hardware #verilog #vhdl #hdl
  9. PipelineC @pipelinec ·

    Advent of Code Day 7: very simple design, good intro to . processing all ~hundreds of elements of an entire line each cycle. ~600 million to ~5.3 billion tachyon beams splitting per second. 😎

    github.com/JulianKemmerer/Pipe

    #pipelinec #aoc25 #fpga #hardware #verilog #vhdl
  10. PipelineC @[email protected] ·

    Advent of Code Day 7: very simple design, good intro to #pipelinec. processing all ~hundreds of elements of an entire line each cycle. ~600 million to ~5.3 billion tachyon beams splitting per second. 😎

    github.com/JulianKemmerer/Pipe

    #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    #pipelinec #aoc25 #fpga #hardware #verilog #vhdl
  11. PipelineC @[email protected] ·

    Advent of Code Day 7: very simple design, good intro to #pipelinec. processing all ~hundreds of elements of an entire line each cycle. ~600 million to ~5.3 billion tachyon beams splitting per second. 😎

    github.com/JulianKemmerer/Pipe

    #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    #eda #asic #hls #rtl #hdl #vhdl
  12. PipelineC @[email protected] ·

    Advent of Code Day 7: very simple design, good intro to #pipelinec. processing all ~hundreds of elements of an entire line each cycle. ~600 million to ~5.3 billion tachyon beams splitting per second. 😎

    github.com/JulianKemmerer/Pipe

    #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    #pipelinec #aoc25 #fpga #hardware #verilog #vhdl
  13. PipelineC @[email protected] ·

    Advent of Code Day 7: very simple design, good intro to #pipelinec. processing all ~hundreds of elements of an entire line each cycle. ~600 million to ~5.3 billion tachyon beams splitting per second. 😎 github.com/JulianKemmer... #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    github.com/JulianKemmerer...

    #pipelinec #aoc25 #fpga #hardware #verilog #vhdl
  14. PipelineC @[email protected] ·

    Advent of Code Day 7: very simple design, good intro to #pipelinec. processing all ~hundreds of elements of an entire line each cycle. ~600 million to ~5.3 billion tachyon beams splitting per second. 😎 github.com/JulianKemmer... #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    github.com/JulianKemmerer...

    #pipelinec #aoc25 #fpga #hardware #verilog #vhdl
  15. PipelineC @[email protected] ·

    Advent of Code Day 7: very simple design, good intro to #pipelinec. processing all ~hundreds of elements of an entire line each cycle. ~600 million to ~5.3 billion tachyon beams splitting per second. 😎 github.com/JulianKemmer... #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    github.com/JulianKemmerer...

    #pipelinec #aoc25 #fpga #hardware #verilog #vhdl
  16. PipelineC @[email protected] ·

    Advent of Code Day 7: very simple design, good intro to #pipelinec. processing all ~hundreds of elements of an entire line each cycle. ~600 million to ~5.3 billion tachyon beams splitting per second. 😎 github.com/JulianKemmer... #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    github.com/JulianKemmerer...

    #eda #asic #hls #rtl #hdl #vhdl
  17. PipelineC @[email protected] ·

    Advent of Code Day 7: very simple design, good intro to #pipelinec. processing all ~hundreds of elements of an entire line each cycle. ~600 million to ~5.3 billion tachyon beams splitting per second. 😎 github.com/JulianKemmer... #aoc25 #fpga #hardware #verilog #vhdl #hdl #rtl #hls #asic #eda

    github.com/JulianKemmerer...

    #pipelinec #aoc25 #fpga #hardware #verilog #vhdl
  18. PipelineC @pipelinec ·

    Advent of Code Day 4: video-like stream of 'pixel' data to a sliding 3x3 window via line buffer fifos. Auto pipeline for kernel function (counting neighbors), ~150M windows per sec. github.com/JulianKemmerer/Pipe

    #fpga #rtl #hdl #hls #aoc25
  19. PipelineC @[email protected] ·

    Advent of Code Day 4: video-like stream of 'pixel' data to a sliding 3x3 window via line buffer fifos. Auto pipeline for kernel function (counting neighbors), ~150M windows per sec. github.com/JulianKemmerer/Pipe

    #fpga #rtl #hdl #hls #aoc25

    #fpga #rtl #hdl #hls #aoc25
  20. PipelineC @[email protected] ·

    Advent of Code Day 4: video-like stream of 'pixel' data to a sliding 3x3 window via line buffer fifos. Auto pipeline for kernel function (counting neighbors), ~150M windows per sec. github.com/JulianKemmerer/Pipe

    #fpga #rtl #hdl #hls #aoc25

    #aoc25 #hls #hdl #rtl #fpga
  21. PipelineC @[email protected] ·

    Advent of Code Day 4: video-like stream of 'pixel' data to a sliding 3x3 window via line buffer fifos. Auto pipeline for kernel function (counting neighbors), ~150M windows per sec. github.com/JulianKemmerer/Pipe

    #fpga #rtl #hdl #hls #aoc25

    #fpga #rtl #hdl #hls #aoc25
  22. PipelineC @pipelinec ·

    Advent of Code Day 9: Iterates over RAM holding points. Autopipeline computes N rectangle areas per clock cycle and finds max. Easily does N=4 at ~100MHz with few pipeline stages, ~400M rect areas computed per sec 🎄

    github.com/JulianKemmerer/Pipe

    #fpga #rtl #hls #aoc25 #hdl
  23. PipelineC @[email protected] ·

    Advent of Code Day 9: Iterates over RAM holding points. Autopipeline computes N rectangle areas per clock cycle and finds max. Easily does N=4 at ~100MHz with few pipeline stages, ~400M rect areas computed per sec 🎄

    github.com/JulianKemmerer/Pipe

    #fpga #rtl #hdl #hls #aoc25

    #fpga #rtl #hls #aoc25 #hdl
  24. PipelineC @[email protected] ·

    Advent of Code Day 9: Iterates over RAM holding points. Autopipeline computes N rectangle areas per clock cycle and finds max. Easily does N=4 at ~100MHz with few pipeline stages, ~400M rect areas computed per sec 🎄

    github.com/JulianKemmerer/Pipe

    #fpga #rtl #hdl #hls #aoc25

    #hdl #aoc25 #hls #rtl #fpga
  25. PipelineC @[email protected] ·

    Advent of Code Day 9: Iterates over RAM holding points. Autopipeline computes N rectangle areas per clock cycle and finds max. Easily does N=4 at ~100MHz with few pipeline stages, ~400M rect areas computed per sec 🎄

    github.com/JulianKemmerer/Pipe

    #fpga #rtl #hdl #hls #aoc25

    #hdl #fpga #rtl #hls #aoc25
  26. PipelineC @[email protected] ·

    Advent of Code Day 3 pipelined no back pressure. N ascii chars as input each cycle. finding max pair of digits pipelined arbitrarily. 8 chars of input each cycle? no problem to get FMAX of 100+MHz.

    ~1 Gbyte per sec of ascii could be processed 😎 🎄
    github.com/JulianKemmerer/Pipe #aoc25 #fpga #hdl #hls

    #aoc25 #fpga #hdl #hls
  27. PipelineC @pipelinec ·

    Advent of Code Day 3 pipelined no back pressure. N ascii chars as input each cycle. finding max pair of digits pipelined arbitrarily. 8 chars of input each cycle? no problem to get FMAX of 100+MHz.

    ~1 Gbyte per sec of ascii could be processed 😎 🎄
    github.com/JulianKemmerer/Pipe

    #aoc25 #fpga #hdl #hls
  28. PipelineC @[email protected] ·

    Advent of Code Day 3 pipelined no back pressure. N ascii chars as input each cycle. finding max pair of digits pipelined arbitrarily. 8 chars of input each cycle? no problem to get FMAX of 100+MHz.

    ~1 Gbyte per sec of ascii could be processed 😎 🎄
    github.com/JulianKemmerer/Pipe #aoc25 #fpga #hdl #hls

    #aoc25 #fpga #hdl #hls
  29. PipelineC @[email protected] ·

    Advent of Code Day 3 pipelined no back pressure. N ascii chars as input each cycle. finding max pair of digits pipelined arbitrarily. 8 chars of input each cycle? no problem to get FMAX of 100+MHz.

    ~1 Gbyte per sec of ascii could be processed 😎 🎄
    github.com/JulianKemmerer/Pipe #aoc25 #fpga #hdl #hls

    #hls #hdl #fpga #aoc25
  30. PipelineC @[email protected] ·

    Advent of Code Day 3 pipelined no back pressure. N ascii chars as input each cycle. finding max pair of digits pipelined arbitrarily. 8 chars of input each cycle? no problem to get FMAX of 100+MHz.

    ~1 Gbyte per sec of ascii could be processed 😎 🎄
    github.com/JulianKemmerer/Pipe #aoc25 #fpga #hdl #hls

    #aoc25 #fpga #hdl #hls
  31. LB Thomas 💎🏳️‍🌈 @[email protected] ·

    Advent of Code is in full swing! 🎄 ☃️ 🎅

    It's shorter this year at 12 days, and I'm doing it in Zig.

    Anyone else participating?

    #AoC #AoC25 #AdventOfCode #AdventOfCode2025 #Zig #Programming

    #aoc #aoc25 #adventofcode #adventofcode2025 #zig #programming
  32. LB Thomas 💎🏳️‍🌈 @[email protected] ·

    Advent of Code is in full swing! 🎄 ☃️ 🎅

    It's shorter this year at 12 days, and I'm doing it in Zig.

    Anyone else participating?

    #AoC #AoC25 #AdventOfCode #AdventOfCode2025 #Zig #Programming

    #aoc #aoc25 #adventofcode #adventofcode2025 #zig #programming
  33. LB Thomas 💎🏳️‍🌈 @[email protected] ·

    Advent of Code is in full swing! 🎄 ☃️ 🎅

    It's shorter this year at 12 days, and I'm doing it in Zig.

    Anyone else participating?

    #AoC #AoC25 #AdventOfCode #AdventOfCode2025 #Zig #Programming

    #aoc #aoc25 #adventofcode #adventofcode2025 #zig #programming
  34. LB Thomas 💎🏳️‍🌈 @[email protected] ·

    Advent of Code is in full swing! 🎄 ☃️ 🎅

    It's shorter this year at 12 days, and I'm doing it in Zig.

    Anyone else participating?

    #AoC #AoC25 #AdventOfCode #AdventOfCode2025 #Zig #Programming

    #programming #zig #adventofcode2025 #adventofcode #aoc25 #aoc
  35. LB Thomas 💎🏳️‍🌈 @[email protected] ·

    Advent of Code is in full swing! 🎄 ☃️ 🎅

    It's shorter this year at 12 days, and I'm doing it in Zig.

    Anyone else participating?

    #AoC #AoC25 #AdventOfCode #AdventOfCode2025 #Zig #Programming

    #aoc #aoc25 #adventofcode #adventofcode2025 #zig #programming