#serdes — Public Fediverse posts
Live and recent posts from across the Fediverse tagged #serdes, aggregated by home.social.
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@xcabal05
I am interested in #LibreRouter technology.The European made #GateMate #FPGA has a #5Gbps #Serdes. I can use it to do #UDP #camera in and display out. So I am just learning about the internet protocol, starting with voltages.
Which Open Source UDP library should I be using? is there one you recommend in Verilog?
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@xcabal05
I am interested in #LibreRouter technology.The European made #GateMate #FPGA has a #5Gbps #Serdes. I can use it to do #UDP #camera in and display out. So I am just learning about the internet protocol, starting with voltages.
Which Open Source UDP library should I be using? is there one you recommend in Verilog?
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@xcabal05
I am interested in #LibreRouter technology.The European made #GateMate #FPGA has a #5Gbps #Serdes. I can use it to do #UDP #camera in and display out. So I am just learning about the internet protocol, starting with voltages.
Which Open Source UDP library should I be using? is there one you recommend in Verilog?
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@xcabal05
I am interested in #LibreRouter technology.The European made #GateMate #FPGA has a #5Gbps #Serdes. I can use it to do #UDP #camera in and display out. So I am just learning about the internet protocol, starting with voltages.
Which Open Source UDP library should I be using? is there one you recommend in Verilog?
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🤖🎉 Oh joy! Another #GitHub project claiming to revolutionize our lives with a #SerDes in Verilog—because everyone and their grandmother needs a serializer/deserializer, right? 🙄 Meanwhile, AI-powered code monkeys are standing by to make sure you still don't write rubbish. 🐒💻
https://github.com/SparcLab/OpenSERDES #Verilog #AI #CodeMonkeys #TechHumor #HackerNews #ngated -
OpenSERDES – Open Hardware Serializer/Deserializer (SerDes) in Verilog
https://github.com/SparcLab/OpenSERDES
#HackerNews #OpenSERDES #OpenHardware #Verilog #SerDes #GitHub
