#rohd — Public Fediverse posts
Live and recent posts from across the Fediverse tagged #rohd, aggregated by home.social.
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🚀 ROHD v0.6.7 released
• Cleaner generated RTL & SystemVerilog
• Faster simulation for glitchy conditionals
• Improved SSA & write-after-read error messages
• Better debugability and APIsLearn more: https://intel.github.io/rohd-website/
Join the discussion: https://discord.gg/DfD2RuAzzh
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🧠 Deep dive: “AI-Accelerated Agile Design Using the ROHD Framework”
How AI and ROHD combine for faster, more correct hardware design.
📝 https://intel.github.io/rohd-website/blog/ai-accelerated-agile-design/💬 Join the ROHD Discord → https://discord.gg/DfD2RuAzzh
#AI #HardwareDesign #ROHD #Verilog #AgileHardware #OpenSource #EDA
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🧠 Deep dive: “AI-Accelerated Agile Design Using the ROHD Framework”
How AI and ROHD combine for faster, more correct hardware design.
📝 https://intel.github.io/rohd-website/blog/ai-accelerated-agile-design/💬 Join the ROHD Discord → https://discord.gg/DfD2RuAzzh
#AI #HardwareDesign #ROHD #Verilog #AgileHardware #OpenSource #EDA
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🧠 Deep dive: “AI-Accelerated Agile Design Using the ROHD Framework”
How AI and ROHD combine for faster, more correct hardware design.
📝 https://intel.github.io/rohd-website/blog/ai-accelerated-agile-design/💬 Join the ROHD Discord → https://discord.gg/DfD2RuAzzh
#AI #HardwareDesign #ROHD #Verilog #AgileHardware #OpenSource #EDA
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🧠 Deep dive: “AI-Accelerated Agile Design Using the ROHD Framework”
How AI and ROHD combine for faster, more correct hardware design.
📝 https://intel.github.io/rohd-website/blog/ai-accelerated-agile-design/💬 Join the ROHD Discord → https://discord.gg/DfD2RuAzzh
#AI #HardwareDesign #ROHD #Verilog #AgileHardware #OpenSource #EDA
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🚀 AI for hardware design is here.
Intel Sr. PE Desmond Kirkpatrick shows how LLMs and the ROHD framework enable agile, test-driven hardware development — for real synthesizable designs.
🎥 https://youtu.be/SAPAi8Y4Z68#AI #Hardware #ROHD #OpenSourceHardware #EDA #VLSI #FPGA #Semiconductors
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🚀 ROHD is now silicon-proven! 🎉
Our open-source hardware framework has officially made it to real silicon! This milestone proves that ROHD is more than just theory—it's powering real chips.
A huge thanks to everyone who contributed! 🏆
🔗 More details: https://intel.github.io/rohd-website/
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It's pretty cool that my post on combinational logic in ROHD is in the top-3 results on Google when you search for `always_comb`! https://intel.github.io/rohd-website/blog/combinational-ssa/ #rohd #always_comb #SystemVerilog #dart #opensource
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While it's disappointing that Dart macros are put on hold, I'm glad that features like augmentation are still planned. I think leveraging build_runner with augmentations could provide a lot! https://buff.ly/3Ei6JST #dart #rohd
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Exciting update for the ROHD community! We're pleased to announce the release of ROHD Cosim v0.3.0, now supporting in/out ports and Verilator for enhanced simulation. Also, ROHD v0.6.2 is out, featuring some bug fixes and improved adder syntax in SystemVerilog. https://buff.ly/3WLth4y #rohd #opensource #hardware #hdl #cosim #verilator
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👋 Hi, I’m Max! I’m an engineer passionate about both hardware & software. I'm a Principal Engineer at Intel helping to shape the future of hardware, and I lead the open-source ROHD project, making hardware development more accessible and fun.
I enjoy working on personal projects (especially with Dart), snowboarding 🏂, gaming 🎮, and exploring new tech.
Excited to connect with folks in open-source, hardware, and beyond! 🚀
#introduction #opensource #hardware #software #soc #fpga #dart #hdl #rohd