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119 results for “0xffff”

  1. MehrPlatzFürsRad @[email protected] ·

    @0xffff Das kann ich so pauschal nicht bestätigen, ich war eher angenehm überrascht, dass es grundsätzlich ganz brauchbar wirkt. Hattest du die Einstellungen richtig gesetzt (Steigungen und viel befahrene Straßen vermeiden)? Erfahrungsgemäß ist es ja mit keiner App perfekt. Welche nutzt du sonst, Komoot? #Apple #Karten #Fahrradnavigation #Komoot

    #apple #karten #fahrradnavigation #komoot
  2. Roel Nieskens @[email protected] ·

    @florian @khaled So the only way to do *anything* with the current text color is to hardcode it to 0xffff for that glyph in the COLR table, and have the additional colors in the CPAL table. Then from CSS you have to set both colors in a convoluted way: one with `color: #f00` on the element or a parent, and the other through a n`@font-palette-values` and a `font-palette` on the element.

    At least, that's how far I got with my tests 😄

    #f00
  3. petur 😶🇺🇦🇵🇸🇹🇼 @[email protected] ·

    Looks like somebody at #espressif got carried away creating the esp-hosted peer data transfer example....

    /* Example Message IDs - use any uint32_t except 0xFFFFFFFF */
    #define MSG_ID_CAT 1
    #define MSG_ID_MEOW 2
    #define MSG_ID_DOG 3
    #define MSG_ID_WOOF 4
    #define MSG_ID_HUMAN 5
    #define MSG_ID_HELLO 6
    #define MSG_ID_GHOST 9

    github.com/espressif/esp-hoste

    #espressif #define
  4. Jon PENNYCOOK @[email protected] ·

    Grrr. Just trying to use #ffmpeg to crop the videos produced by my #Cycliq Fly12 Sport #bike #camera - half of the files come up with errors like this
    `Invalid data found when processing input
    [mov,mp4,m4a,3gp,3g2,mj2 @ 0000020c378f7f00] stream 1, offset 0xffffff0300ffffff: partial file`
    This never happened with my other #ActionCamera

    I need to crop them to remove the on-screen date and time stamp. I need that on the videos for safety, but need to remove for uploading to #Mapillary

    #mapillary #actioncamera #camera #bike #cycliq #ffmpeg
  5. Astra Kernel :verified: @[email protected] ·

    ✨ Rust challenge explained

    Ans: C. It never reaches the prints statement. It goes in an infinite loop 😲

    But, how? Let's break down

    👉 End value is 0xfffffff which is 268435455.0. it is not very important here. So let's remove it and simplify the code with a constant 20,000,000.0 end value

    👉 `f` value stops increasing(round upped) after value 16777216.0 when you add just 1.0 🤯

    👉 To know why,you have to understand how the f32 is stored. Float is not stored as simple as integer

    👉 f32 uses IEEE 754 format to store the value

    👉 Larger f32 number loses accuracy

    In a 32 bit float (any language not just rust):

    👉 1st bit is used for sign identification (positive or negative)
    👉 Following 8 bits used for exponent
    👉 Next 23 bits used for storing mantissa 🙃

    You can see more here, how it is calculated
    youtu.be/8afbTaA-gOQ

    (Continued 👇)

    #rustlang #RustChallenge #programmers #rust

    #rustlang #rustchallenge #programmers #rust
  6. Astra Kernel :verified: @[email protected] ·

    ✨ Rust challenge explained

    Ans: C. It never reaches the prints statement. It goes in an infinite loop 😲

    But, how? Let's break down

    👉 End value is 0xfffffff which is 268435455.0. it is not very important here. So let's remove it and simplify the code with a constant 20,000,000.0 end value

    👉 `f` value stops increasing(round upped) after value 16777216.0 when you add just 1.0 🤯

    👉 To know why,you have to understand how the f32 is stored. Float is not stored as simple as integer

    👉 f32 uses IEEE 754 format to store the value

    👉 Larger f32 number loses accuracy

    In a 32 bit float (any language not just rust):

    👉 1st bit is used for sign identification (positive or negative)
    👉 Following 8 bits used for exponent
    👉 Next 23 bits used for storing mantissa 🙃

    You can see more here, how it is calculated
    youtu.be/8afbTaA-gOQ

    (Continued 👇)

    #rustlang #RustChallenge #programmers #rust

    #rustlang #rustchallenge #programmers #rust
  7. Astra Kernel :verified: @[email protected] ·

    ✨ Rust challenge explained

    Ans: C. It never reaches the prints statement. It goes in an infinite loop 😲

    But, how? Let's break down

    👉 End value is 0xfffffff which is 268435455.0. it is not very important here. So let's remove it and simplify the code with a constant 20,000,000.0 end value

    👉 `f` value stops increasing(round upped) after value 16777216.0 when you add just 1.0 🤯

    👉 To know why,you have to understand how the f32 is stored. Float is not stored as simple as integer

    👉 f32 uses IEEE 754 format to store the value

    👉 Larger f32 number loses accuracy

    In a 32 bit float (any language not just rust):

    👉 1st bit is used for sign identification (positive or negative)
    👉 Following 8 bits used for exponent
    👉 Next 23 bits used for storing mantissa 🙃

    You can see more here, how it is calculated
    youtu.be/8afbTaA-gOQ

    (Continued 👇)

    #rustlang #RustChallenge #programmers #rust

    #rustlang #rustchallenge #programmers #rust
  8. Astra Kernel :verified: @[email protected] ·

    ✨ Rust challenge explained

    Ans: C. It never reaches the prints statement. It goes in an infinite loop 😲

    But, how? Let's break down

    👉 End value is 0xfffffff which is 268435455.0. it is not very important here. So let's remove it and simplify the code with a constant 20,000,000.0 end value

    👉 `f` value stops increasing(round upped) after value 16777216.0 when you add just 1.0 🤯

    👉 To know why,you have to understand how the f32 is stored. Float is not stored as simple as integer

    👉 f32 uses IEEE 754 format to store the value

    👉 Larger f32 number loses accuracy

    In a 32 bit float (any language not just rust):

    👉 1st bit is used for sign identification (positive or negative)
    👉 Following 8 bits used for exponent
    👉 Next 23 bits used for storing mantissa 🙃

    You can see more here, how it is calculated
    youtu.be/8afbTaA-gOQ

    (Continued 👇)

    #rustlang #RustChallenge #programmers #rust

    #rust #programmers #rustchallenge #rustlang
  9. Astra Kernel :verified: @[email protected] ·

    ✨ Rust challenge explained

    Ans: C. It never reaches the prints statement. It goes in an infinite loop 😲

    But, how? Let's break down

    👉 End value is 0xfffffff which is 268435455.0. it is not very important here. So let's remove it and simplify the code with a constant 20,000,000.0 end value

    👉 `f` value stops increasing(round upped) after value 16777216.0 when you add just 1.0 🤯

    👉 To know why,you have to understand how the f32 is stored. Float is not stored as simple as integer

    👉 f32 uses IEEE 754 format to store the value

    👉 Larger f32 number loses accuracy

    In a 32 bit float (any language not just rust):

    👉 1st bit is used for sign identification (positive or negative)
    👉 Following 8 bits used for exponent
    👉 Next 23 bits used for storing mantissa 🙃

    You can see more here, how it is calculated
    youtu.be/8afbTaA-gOQ

    (Continued 👇)

    #rustlang #RustChallenge #programmers #rust

    #rustlang #rustchallenge #programmers #rust
  10. Lup Yuen Lee 李立源 @[email protected] ·

    @ubports @PINE64 Wasn't expecting a Segmentation Fault in the GTK Go app... Maybe it's the funny PC address 0xffff... Will try again with a simple GTK program in C.

    Yep #UBTouch prefers #Qt apps... But I'm stubbornly resisting the urge 🙂 docs.ubports.com/en/latest/app

    #qt #ubtouch
  11. Icepi Zero Bot @[email protected] ·

    @[email protected]

    @[email protected] asked

    #[no_mangle(all)] entity my_code( clk: clock, rst: bool, px: int<32>, py: int<32>, hsync: bool, vsync: bool, col: int<32>, row: int<32>, char: inv &int<32>, foreground_color: inv &uint<24>, background_color: inv &uint<24>, ) { set char = &0; set foreground_color = &0xFFFFFFu24; set background_color = &0xFF7AFFu24; }

    Success!

    UART Output


    UtilizationCellUsedAvailableUsageDCCA2563.6%EHXPLLL1250.0%TRELLIS_COMB359242881.5%TRELLIS_FF113242880.5%TRELLIS_IO101975.1%
    TimingClockAchievedConstraint$glbnet$clkp140.29 MHz25 MHz$glbnet$clkt363.5 MHz250 MHz
    Code

    #[no_mangle(all)]
entity my_code(
    clk: clock,
    rst: bool,
    px: int<32>,
    py: int<32>,
    hsync: bool,
    vsync: bool,
    col: int<32>,
    row: int<32>,
    char: inv &int<32>,
    foreground_color: inv &uint<24>,
    background_color: inv &uint<24>,
) {
    set char = &0;
    set foreground_color = &0xFFFFFFu24;
    set background_color = &0xFF7AFFu24;
}


    #FPGA #Icepi-Zero #HDL #Spade
    #fpga #icepizero #hdl #spade
  12. Icepi Zero Bot @[email protected] ·

    @[email protected]

    @[email protected] asked

    #[no_mangle(all)] entity my_code( clk: clock, rst: bool, px: int<32>, py: int<32>, hsync: bool, vsync: bool, col: int<32>, row: int<32>, char: inv &int<32>, foreground_color: inv &uint<24>, background_color: inv &uint<24>, ) { set char = &0; set foreground_color = &0xFFFFFFu24; set background_color = &0xFF7AFFu24; }

    Success!

    UART Output


    UtilizationCellUsedAvailableUsageDCCA2563.6%EHXPLLL1250.0%TRELLIS_COMB359242881.5%TRELLIS_FF113242880.5%TRELLIS_IO101975.1%
    TimingClockAchievedConstraint$glbnet$clkp140.29 MHz25 MHz$glbnet$clkt363.5 MHz250 MHz
    Code

    #[no_mangle(all)]
entity my_code(
    clk: clock,
    rst: bool,
    px: int<32>,
    py: int<32>,
    hsync: bool,
    vsync: bool,
    col: int<32>,
    row: int<32>,
    char: inv &int<32>,
    foreground_color: inv &uint<24>,
    background_color: inv &uint<24>,
) {
    set char = &0;
    set foreground_color = &0xFFFFFFu24;
    set background_color = &0xFF7AFFu24;
}


    #FPGA #Icepi-Zero #HDL #Spade
    #fpga #icepizero #hdl #spade
  13. Icepi Zero Bot @[email protected] ·

    @[email protected]

    @[email protected] asked

    #[no_mangle(all)] entity my_code( clk: clock, rst: bool, px: int<32>, py: int<32>, hsync: bool, vsync: bool, col: int<32>, row: int<32>, char: inv &int<32>, foreground_color: inv &uint<24>, background_color: inv &uint<24>, ) { set char = &0; set foreground_color = &0xFFFFFFu24; set background_color = &0xFF7AFFu24; }

    Success!

    UART Output


    UtilizationCellUsedAvailableUsageDCCA2563.6%EHXPLLL1250.0%TRELLIS_COMB359242881.5%TRELLIS_FF113242880.5%TRELLIS_IO101975.1%
    TimingClockAchievedConstraint$glbnet$clkp140.29 MHz25 MHz$glbnet$clkt363.5 MHz250 MHz
    Code

    #[no_mangle(all)]
entity my_code(
    clk: clock,
    rst: bool,
    px: int<32>,
    py: int<32>,
    hsync: bool,
    vsync: bool,
    col: int<32>,
    row: int<32>,
    char: inv &int<32>,
    foreground_color: inv &uint<24>,
    background_color: inv &uint<24>,
) {
    set char = &0;
    set foreground_color = &0xFFFFFFu24;
    set background_color = &0xFF7AFFu24;
}


    #FPGA #Icepi-Zero #HDL #Spade
    #fpga #icepizero #hdl #spade
  14. Icepi Zero Bot @[email protected] ·

    @[email protected]

    @[email protected] asked

    #[no_mangle(all)] entity my_code( clk: clock, rst: bool, px: int<32>, py: int<32>, hsync: bool, vsync: bool, col: int<32>, row: int<32>, char: inv &int<32>, foreground_color: inv &uint<24>, background_color: inv &uint<24>, ) { set char = &0; set foreground_color = &0xFFFFFFu24; set background_color = &0xFF7AFFu24; }

    Success!

    UART Output


    UtilizationCellUsedAvailableUsageDCCA2563.6%EHXPLLL1250.0%TRELLIS_COMB359242881.5%TRELLIS_FF113242880.5%TRELLIS_IO101975.1%
    TimingClockAchievedConstraint$glbnet$clkp140.29 MHz25 MHz$glbnet$clkt363.5 MHz250 MHz
    Code

    #[no_mangle(all)]
entity my_code(
    clk: clock,
    rst: bool,
    px: int<32>,
    py: int<32>,
    hsync: bool,
    vsync: bool,
    col: int<32>,
    row: int<32>,
    char: inv &int<32>,
    foreground_color: inv &uint<24>,
    background_color: inv &uint<24>,
) {
    set char = &0;
    set foreground_color = &0xFFFFFFu24;
    set background_color = &0xFF7AFFu24;
}


    #FPGA #Icepi-Zero #HDL #Spade
    #spade #hdl #icepizero #fpga
  15. Icepi Zero Bot @[email protected] ·

    @[email protected]

    @[email protected] asked

    #[no_mangle(all)] entity my_code( clk: clock, rst: bool, px: int<32>, py: int<32>, hsync: bool, vsync: bool, col: int<32>, row: int<32>, char: inv &int<32>, foreground_color: inv &uint<24>, background_color: inv &uint<24>, ) { set char = &0; set foreground_color = &0xFFFFFFu24; set background_color = &0xFF7AFFu24; }

    Success!

    UART Output


    UtilizationCellUsedAvailableUsageDCCA2563.6%EHXPLLL1250.0%TRELLIS_COMB359242881.5%TRELLIS_FF113242880.5%TRELLIS_IO101975.1%
    TimingClockAchievedConstraint$glbnet$clkp140.29 MHz25 MHz$glbnet$clkt363.5 MHz250 MHz
    Code

    #[no_mangle(all)]
entity my_code(
    clk: clock,
    rst: bool,
    px: int<32>,
    py: int<32>,
    hsync: bool,
    vsync: bool,
    col: int<32>,
    row: int<32>,
    char: inv &int<32>,
    foreground_color: inv &uint<24>,
    background_color: inv &uint<24>,
) {
    set char = &0;
    set foreground_color = &0xFFFFFFu24;
    set background_color = &0xFF7AFFu24;
}


    #FPGA #Icepi-Zero #HDL #Spade
    #fpga #icepizero #hdl #spade
  16. Michael Ossmann @[email protected] ·

    This #Si5351 rabbit hole keeps getting deeper. After improving #HackRF mean sample rate error by three orders of magnitude a few weeks ago, we've now improved it by five more orders of magnitude.

    Diego noticed that my greatest common divisor function could be replaced by a fast counting of zero bits. The reason this was possible was that it turned out that my implementation only selected denominators that were either a power of two or the maximum denominator (0xfffff).

    #si5351 #hackrf
  17. Michael Ossmann @[email protected] ·

    This #Si5351 rabbit hole keeps getting deeper. After improving #HackRF mean sample rate error by three orders of magnitude a few weeks ago, we've now improved it by five more orders of magnitude.

    Diego noticed that my greatest common divisor function could be replaced by a fast counting of zero bits. The reason this was possible was that it turned out that my implementation only selected denominators that were either a power of two or the maximum denominator (0xfffff).

    #si5351 #hackrf
  18. Michael Ossmann @[email protected] ·

    This #Si5351 rabbit hole keeps getting deeper. After improving #HackRF mean sample rate error by three orders of magnitude a few weeks ago, we've now improved it by five more orders of magnitude.

    Diego noticed that my greatest common divisor function could be replaced by a fast counting of zero bits. The reason this was possible was that it turned out that my implementation only selected denominators that were either a power of two or the maximum denominator (0xfffff).

    #si5351 #hackrf
  19. Michael Ossmann @[email protected] ·

    This #Si5351 rabbit hole keeps getting deeper. After improving #HackRF mean sample rate error by three orders of magnitude a few weeks ago, we've now improved it by five more orders of magnitude.

    Diego noticed that my greatest common divisor function could be replaced by a fast counting of zero bits. The reason this was possible was that it turned out that my implementation only selected denominators that were either a power of two or the maximum denominator (0xfffff).

    #hackrf #si5351
  20. Michael Ossmann @[email protected] ·

    This #Si5351 rabbit hole keeps getting deeper. After improving #HackRF mean sample rate error by three orders of magnitude a few weeks ago, we've now improved it by five more orders of magnitude.

    Diego noticed that my greatest common divisor function could be replaced by a fast counting of zero bits. The reason this was possible was that it turned out that my implementation only selected denominators that were either a power of two or the maximum denominator (0xfffff).

    #si5351 #hackrf
  21. Nokita Kaze @[email protected] ·

    Да... Это BSoD... Это не фотошоп, клянусь.
    Да, это из-за #OOM.
    Никита такое видит в первый раз в жизни. Никита всё ещё могёт

    Компьютер был перезагружен после критической ошибки. Код ошибки: 0x00000051 (0x0000000000000011, 0xffffa908331610a0, 0x0000000000000000, 0x0000000000000000).
    Дамп памяти сохранен в: C:\Windows\MEMORY.DMP. Код отчета: 4711e0a5-ec2b-4c3c-b11c-434dbcc41597.

    #Windows #Windows10 #lol #bsod

    #windows #lol #windows10 #oom
  22. psf @[email protected] ·

    @pesco I interpret the standard the same way you do, yielding a result of 910.

    If you are #OpenWatcom, though, the answer is divide overflow!

    x86 div instructions take a dividend that is twice as wide as the quotient or remainder. In 16 bit mode the relevant ones are,

    • DIV: u32 / u16 -> u16
    • IDIV: i32 / i16 -> i16

    What OpenWatcom does is:

    • sign extend -32768 (0x8000) to 0xffff8000
    • DIV 0xffff8000 / 36
    • die horribly on divide overflow

    If it wanted a signed result it should have used IDIV. If it wanted an unsigned result it should have zero padded the operand instead of sign extending. Seems like a codegen bug.

    I should probably check if the latest version of OpenWatcom still does this, and if so, see about reporting it. It isn't the only weird result I noticed in OpenWatcom's math, either.

    #openwatcom
  23. Dendrobatus Azureus @[email protected] ·

    Jumping in deep immediately

    OS Linux
    Kernel 6.x
    found workaround for hardware errors on critical timer tsc

    snippet from dmesg

    [ 0.000000] tsc: Fast TSC calibration using PIT
    [ 0.000000] tsc: Detected 1796.607 MHz processor

    snippet two

    [ 0.068905] AMD-Vi: Using global IVHD EFR:0x206d73ef22254ade, EFR2:0x0
    [ 0.069804] ..TIMER: vector=0x30 apic1=0 pin1=2 apic2=-1 pin2=-1
    [ 0.074120] clocksource: tsc-early: mask: 0xffffffffffffffff max_cycles: 0x19e5a467a58, max_idle_ns: 440795257552 ns
    [ 0.074127] Calibrating delay loop (skipped), value calculated using timer frequency.. 3593.21 BogoMIPS (lpj=1796607)
    [ 0.074141] Zenbleed: please update your microcode for the most optimal fix

    line [ 0.074141] clearly states that my microcode is not updated (not related to tsc)

    [ 0.210124] TSC synchronization [CPU#0 -> CPU#8]:
    [ 0.210124] Measured 2808 cycles TSC warp between CPUs, turning off TSC clock.
    [ 0.210126] tsc: Marking TSC unstable due to check_tsc_sync_source failed
    [ 0.210176] #1 #3 #5 #7 #9 #11 #13 #15

    I added tsc=unstable to the boot options in grub, so from what I read here the parameter was passed to the kernel? Can someone please verify for me if this output states that?

    The warning I get is that the BIOS of this machine is broken! and that the option tsc=unstable will work around that massive bug

    #bash #csh #ksh #sh #kernel #parameters #grub #POST #bios #UEFI #Linux #dmesg #Boot #options #programming #POSIX

    #bash #csh #ksh #sh #parameters #grub
  24. FCLC @[email protected] ·

    Clang/LLVM friends, trying to understand *why* Clang (18) doesn't see through what seems to me like an obvious optimization.

    #compiler_explorer link here, explanation of what I don't understand follows:
    godbolt.org/z/j8WqsMjb6

    Going through Hackers delight and doing some of the dirt simple exercises, I dumped the assembly for Chapter 1 exercise 2 "loop that goes from 1 to 0xFFFFFFFF". (changed to not fault in CE)

    (continues in next post, but putting hashtags here)

    #clang #compilers #SIMD

    #compiler_explorer #clang #compilers #simd
  25. FCLC @[email protected] ·

    Clang/LLVM friends, trying to understand *why* Clang (18) doesn't see through what seems to me like an obvious optimization.

    #compiler_explorer link here, explanation of what I don't understand follows:
    godbolt.org/z/j8WqsMjb6

    Going through Hackers delight and doing some of the dirt simple exercises, I dumped the assembly for Chapter 1 exercise 2 "loop that goes from 1 to 0xFFFFFFFF". (changed to not fault in CE)

    (continues in next post, but putting hashtags here)

    #clang #compilers #SIMD

    #compiler_explorer #clang #compilers #simd
  26. FCLC @[email protected] ·

    Clang/LLVM friends, trying to understand *why* Clang (18) doesn't see through what seems to me like an obvious optimization.

    #compiler_explorer link here, explanation of what I don't understand follows:
    godbolt.org/z/j8WqsMjb6

    Going through Hackers delight and doing some of the dirt simple exercises, I dumped the assembly for Chapter 1 exercise 2 "loop that goes from 1 to 0xFFFFFFFF". (changed to not fault in CE)

    (continues in next post, but putting hashtags here)

    #clang #compilers #SIMD

    #compiler_explorer #clang #compilers #simd
  27. FCLC @[email protected] ·

    Clang/LLVM friends, trying to understand *why* Clang (18) doesn't see through what seems to me like an obvious optimization.

    #compiler_explorer link here, explanation of what I don't understand follows:
    godbolt.org/z/j8WqsMjb6

    Going through Hackers delight and doing some of the dirt simple exercises, I dumped the assembly for Chapter 1 exercise 2 "loop that goes from 1 to 0xFFFFFFFF". (changed to not fault in CE)

    (continues in next post, but putting hashtags here)

    #clang #compilers #SIMD

    #simd #compilers #clang #compiler_explorer
  28. FCLC @[email protected] ·

    Clang/LLVM friends, trying to understand *why* Clang (18) doesn't see through what seems to me like an obvious optimization.

    #compiler_explorer link here, explanation of what I don't understand follows:
    godbolt.org/z/j8WqsMjb6

    Going through Hackers delight and doing some of the dirt simple exercises, I dumped the assembly for Chapter 1 exercise 2 "loop that goes from 1 to 0xFFFFFFFF". (changed to not fault in CE)

    (continues in next post, but putting hashtags here)

    #clang #compilers #SIMD

    #compiler_explorer #clang #compilers #simd
  29. Christian Blichmann🇺🇦 @[email protected] ·

    In the spirit of "this talk could've been a tweet", I just pushed a button:

    #BinDiff is now open source.

    - This is a snapshot release, no major new functionality
    - Release binaries will follow later today or tomorrow
    - This is my 20% and I won't we able to act on PRs until end of Q4 (OOO traveling)

    Thanks everyone for making this possible!

    Shout out to @HalvarFlake, ObfuscaTHOR, Nils, Tora,
    @shanehuntley, @erocarrera, 0xfffffffe

    Happy diffing!

    github.com/google/bindiff/rele

    #bindiff
  30. Willard Goosey @[email protected] ·

    Success!!!
    I'm not sure the clone #z80 in the #wp2 groks "ld bc,(address)" which is a properly z80 thing to say.
    Changed it to "ld hl, (address)
    ld b,h
    ld c,l" and it worked.

    I have now confirmed that the stack is *below* the program area of 0xAC00-0xFFFF.
    The techref says the stack area is from 0xA800 to 0xABFF which shows once again 5 minutes of RTFM can save hours of WTF. :-)
    OTOH trusting Tandy docs? Not a good plan. <shrug>

    #z80 #wp2
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