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#ccx — Public Fediverse posts

Live and recent posts from across the Fediverse tagged #ccx, aggregated by home.social.

  1. Wir sind heute mit unserem Partner #Teleport bei der #CCX Cloud Computing Conference der Vogel IT-Akademie in Frankfurt/Main #ccxcon

    Kommt vorbei! 👋

  2. #AMD's #Ryzen8000 #StrixPoint' to Use #Zen5 and #Zen5c Cores
    According to a leak, 'Strix Point' #APU will pack four fully-fledged Zen 5 cores with 16 MB L3 cache, eight Zen 5c cores with 8 MB L3 cache, and an integrated GPU with 8 WGPs (1024 stream processors) based on the #RDNA 3.5 architecture into a big monolithic die. The CPU cores will purportedly be distributed over two core complexes (#CCX).
    tomshardware.com/news/amds-ryz

  3. #AMD's #Ryzen8000 #StrixPoint' to Use #Zen5 and #Zen5c Cores
    According to a leak, 'Strix Point' #APU will pack four fully-fledged Zen 5 cores with 16 MB L3 cache, eight Zen 5c cores with 8 MB L3 cache, and an integrated GPU with 8 WGPs (1024 stream processors) based on the #RDNA 3.5 architecture into a big monolithic die. The CPU cores will purportedly be distributed over two core complexes (#CCX).
    tomshardware.com/news/amds-ryz

  4. 's ' to Use and Cores
    According to a leak, 'Strix Point' will pack four fully-fledged Zen 5 cores with 16 MB L3 cache, eight Zen 5c cores with 8 MB L3 cache, and an integrated GPU with 8 WGPs (1024 stream processors) based on the 3.5 architecture into a big monolithic die. The CPU cores will purportedly be distributed over two core complexes ().
    tomshardware.com/news/amds-ryz

  5. #AMD's #Ryzen8000 #StrixPoint' to Use #Zen5 and #Zen5c Cores
    According to a leak, 'Strix Point' #APU will pack four fully-fledged Zen 5 cores with 16 MB L3 cache, eight Zen 5c cores with 8 MB L3 cache, and an integrated GPU with 8 WGPs (1024 stream processors) based on the #RDNA 3.5 architecture into a big monolithic die. The CPU cores will purportedly be distributed over two core complexes (#CCX).
    tomshardware.com/news/amds-ryz

  6. #AMD's #Ryzen8000 #StrixPoint' to Use #Zen5 and #Zen5c Cores
    According to a leak, 'Strix Point' #APU will pack four fully-fledged Zen 5 cores with 16 MB L3 cache, eight Zen 5c cores with 8 MB L3 cache, and an integrated GPU with 8 WGPs (1024 stream processors) based on the #RDNA 3.5 architecture into a big monolithic die. The CPU cores will purportedly be distributed over two core complexes (#CCX).
    tomshardware.com/news/amds-ryz