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Hans @hansfbaier · 2024-02-16 · 01:54 UTC

This is how the upcoming revision of the #MiSTeX #FPGA #retrogaming console will look like. Do you think I need ESD protection on the buttons, switches, SDCARD signals, analog headphone jack and Pmod?

#mistex #fpga #retrogaming

Hans @hansfbaier · 2024-02-16 · 00:51 UTC

Revision 1 of the #MiSTeX #FPGA #retrogaming baseboard is maturing. Since I had spurious connectivity problems with rev 0, I used stricter design rules, fixing 200+ violations. Also added configuration switches, and the Pmod is now double row (8 signals).

#retrogaming #mistex #fpga

Hans @hansfbaier · 2024-02-14 · 09:32 UTC

Some bad news: The #MiSTeX #FPGA #retrogaming console works fine for some time, but after a while the SPI communication goes corrupt, ie the FPGA gets garbage. But I can see no qualitative difference of the signal on the Scope of the SPI before/after it works.

#mistex #fpga #retrogaming

Hans @hansfbaier · 2024-02-12 · 21:09 UTC

The first core using SDRAM (and the first console!) works on #MiSTeX #FPGA (Xilinx)!

#mistex #fpga

Hans @hansfbaier · 2024-02-10 · 01:14 UTC

Finally got MemTest working at 140 MHz without errors.
That #MiSTeX #FPGA #retrogames #console is now fully verified working!

#mistex #fpga #retrogames #console

Hans @hansfbaier · 2024-01-23 · 01:35 UTC

The #MiSTeX #FPGA retro game console for #QMTech core boards is almost ready to be sent to the fab @JLCPCB
You can look into the design files here:
https://kicanvas.org/?github=https%3A%2F%2Fgithub.com%2FMiSTeX-devel%2FMiSTeX-hardware%2Ftree%2Fmain%2FQMTech-MiSTeX

#mistex #fpga #qmtech

Hans @hansfbaier · 2024-01-05 · 10:04 UTC

There is now a docker container version available for the #openXC7 #opensource #FPGA toolchain:

https://github.com/openXC7/toolchain-nix/tree/main

#openxc7 #opensource #fpga

Hans @hansfbaier · 2023-12-15 · 04:58 UTC

The #openXC7 #opensource #FPGA toolchain now uses Yosys 0.36, upgrading from Yosys 0.17, since the problems it had with Xilinx series 7 FPGAs have been resolved.

#openxc7 #opensource #fpga

Hans @hansfbaier · 2023-12-15 · 04:33 UTC

New release of the #openxc7 #opensource #FPGA toolchain.
https://github.com/openXC7/openXC7-snap/releases/tag/0.7.0

#openxc7 #opensource #fpga

Hans @hansfbaier · 2023-12-15 · 00:20 UTC

Yay! MMCME2_ADV on the #openxc7 #OpenSource #FPGA toolchain now supports fractional scaling! This is 100MHz * 10.625 / 20.875

#openxc7 #opensource #fpga

Hans @hansfbaier · 2023-12-12 · 03:15 UTC

First blinky driven by an MMCME2_ADV PLL, using the #openxc7 #opensource #FPGA toolchain.

#openxc7 #opensource #fpga

Hans @hansfbaier · 2023-11-26 · 19:36 UTC

Many thanks to Milosch Meriac, for contributing a podman containerized version of the Nix toolchain packaging of the #opensource #openXC7 #FPGA toolchain

https://github.com/openXC7/toolchain-nix/pull/10

#opensource #openxc7 #fpga

Hans @hansfbaier · 2023-10-27 · 22:16 UTC

Good news for the #openXC7 #opensource #FPGA toolchain. It might be just time to move from yosys 0.17 to yosys 0.34.
Not only seem the abc9 crashes and the BRAM problems seem to have gone away, 0.17 seemed to generate broken hardware DSPs in some cases where 0.34 does not.

#openxc7 #opensource #fpga

Hans @hansfbaier · 2023-10-27 · 22:09 UTC

Thanks @splinedrive
for testing countless bitstreams from the #openXC7 #opensource #FPGA toolchain on the Artix7 with your SoC, which, interestingly enough triggered some bugs which the much more complex @enjoy_digital
LiteX SoC did not. The toolchain became so much better!

#openxc7 #opensource #fpga