home.social

#de0 — Public Fediverse posts

Live and recent posts from across the Fediverse tagged #de0, aggregated by home.social.

  1. Finally playing with logic schematic design in #quartus for my #DE0-nano #FPGA #dev board.

    Big win for me, getting this far. Still got to blow the design into the dev board. Pins to assign, clocks to configure, #IDE controls to learn.

    Standing on the shoulders of giants. If you FPGA, you rock.

  2. Finally playing with logic schematic design in #quartus for my #DE0-nano #FPGA #dev board.

    Big win for me, getting this far. Still got to blow the design into the dev board. Pins to assign, clocks to configure, #IDE controls to learn.

    Standing on the shoulders of giants. If you FPGA, you rock.

  3. Finally playing with logic schematic design in #quartus for my #DE0-nano #FPGA #dev board.

    Big win for me, getting this far. Still got to blow the design into the dev board. Pins to assign, clocks to configure, #IDE controls to learn.

    Standing on the shoulders of giants. If you FPGA, you rock.

  4. Finally playing with logic schematic design in #quartus for my #DE0-nano #FPGA #dev board.

    Big win for me, getting this far. Still got to blow the design into the dev board. Pins to assign, clocks to configure, #IDE controls to learn.

    Standing on the shoulders of giants. If you FPGA, you rock.

  5. Finally playing with logic schematic design in #quartus for my #DE0-nano #FPGA #dev board.

    Big win for me, getting this far. Still got to blow the design into the dev board. Pins to assign, clocks to configure, #IDE controls to learn.

    Standing on the shoulders of giants. If you FPGA, you rock.

  6. Joy... win11 accepts my old #DE0-Nano #fpga dev board's #Altera #usb #blaster drivers, and a demo prog now talks to the board. Whoosh.

    Next, I pray that I get good at turning logic design schematics into deployable code.

  7. Joy... win11 accepts my old #DE0-Nano #fpga dev board's #Altera #usb #blaster drivers, and a demo prog now talks to the board. Whoosh.

    Next, I pray that I get good at turning logic design schematics into deployable code.

  8. Joy... win11 accepts my old #DE0-Nano #fpga dev board's #Altera #usb #blaster drivers, and a demo prog now talks to the board. Whoosh.

    Next, I pray that I get good at turning logic design schematics into deployable code.

  9. Joy... win11 accepts my old #DE0-Nano #fpga dev board's #Altera #usb #blaster drivers, and a demo prog now talks to the board. Whoosh.

    Next, I pray that I get good at turning logic design schematics into deployable code.

  10. Joy... win11 accepts my old #DE0-Nano #fpga dev board's #Altera #usb #blaster drivers, and a demo prog now talks to the board. Whoosh.

    Next, I pray that I get good at turning logic design schematics into deployable code.