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  1. Jakub Cabal @[email protected] ·

    🗓️ Verification Academy Live BRNO
    May 21 2026 in Brno, Czech Republic

    Three main topics on the table:
    - Questa One & faster verification closure
    - Static/formal verification
    - AI in verification workflows

    In-person only. Brno University of Technology, Bozetechova, Room A112.

    verificationacademy.com/topics

    #QuestaOne #SystemVerilog #UVM #FPGA #ASIC #FormalVerification #SiemensEDA

    #questaone #systemverilog #uvm #fpga #asic #formalverification
  2. Jakub Cabal @[email protected] ·

    🗓️ Verification Academy Live BRNO
    May 21 2026 in Brno, Czech Republic

    Three main topics on the table:
    - Questa One & faster verification closure
    - Static/formal verification
    - AI in verification workflows

    In-person only. Brno University of Technology, Bozetechova, Room A112.

    verificationacademy.com/topics

    #QuestaOne #SystemVerilog #UVM #FPGA #ASIC #FormalVerification #SiemensEDA

    #questaone #systemverilog #uvm #fpga #asic #formalverification
  3. heise online (inoffiziell) @[email protected] ·
    Für die Entwicklung von Halbleitern kommen essenzielle Tools vorwiegend aus den USA. Chinesische Hersteller wollen für mögliche Handelskriege vorbereitet sein.
    Angst vor Sanktionen: Chinesische Chiphersteller wollen weg von US-Software
    #usa #china #sanktionen #halbleiterindustrie #tsmc #synopsys