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#technologymapping — Public Fediverse posts

Live and recent posts from across the Fediverse tagged #technologymapping, aggregated by home.social.

  1. Not every gate is symmetrical w.r.t its inputs. In order to allow asymmetrical gates to be mapped in all cases, all unique permutated AND-INVERTER graphs representing the gate must be present in the pattern matching set. This is obviously a problem for tomorrow..

    #VLSI #ASIC #TechnologyMapping