#icestudio — Public Fediverse posts
Live and recent posts from across the Fediverse tagged #icestudio, aggregated by home.social.
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En el "Rural worshop" de "pinos del valley", visitando al Maestro de Maestros Eladio
¡Qué ganas tenía de volver a verte!
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He actualizado el proyecto SIMPLEZ F a la Alhambra-II y las últimas versiones de #icestudio y #apio
Simplez es el procesador educativo mínimo creado por el profesor Gregorio Fernández (D.E.P), con las que muchas generaciones de ingenieros hemos aprendido
https://github.com/Obijuan/simplez-fpga/wiki -
Es un privilegio estar ahí. ¡Gracias! 😀
#FPGAwars #apio #icestudio
#PatrimonioTecnologicoHumanidad -
El ecosistema de las FPGAs Libres creciendo poco a poco...😀
#FPGAwars #icestudio #apio
(Via @ico_TC en twitter) -
Apio 0.8.2 released!
New boards, bug fixes, code refactoring...
Release notes:
https://github.com/FPGAwars/apio/wiki/Release-history#version-082
#apio #icestudio #fpgawars -
I'm really impressed with the #opensource #icestudio #fpga programmer so far. And I usually *hate* #guis.
The workflow in the #nandland #goboard tutorials looks so extremely painful compared to this.
I'm definitely still bracing for "my" way to turn out harder/worse in the long run, tho.
The top row is basically a direct copy of the tutorial (still had to figure out how the gui does this, tho). The bottom row is me reverse engineering how to do this with #icestudio blocks.
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#icestudio has all the #nandland #goboard #fpga tutorial projects built into it, so I assume that means it is capable enough for this. That's great!
I feel like I'm learning #icestudio instead of #verilog or #vhdl, tho.
It's all open source, so probably the "raw" files it produces aren't going to be hidden from me. I'll just see if I can following a verilog tutorial to make an icestudio project...