Search
1000 results for “craigjb”
-
Long overdue blog post!
“But what if every button is also a screen?” That’s the question that started a multi-year project to build a custom electronic music production device, the SoundSlab. One glorious day it will be part sequencer, part sampler, part synthesizer, and part slab. Today it’s a never-ending hobby project…
-
It’s a relatively simple example for the SpinalHDL library I've been working on: spiny.
spinal/Blinky.scala defines the SoC, super short.
That definition auto-generates a SVD file, which is then fed to svd2rust to create a peripheral access crate (PAC). That gives nice Rusty strucs and methods for accessing all the registers. The rust firmware using it is in fw/src/main.rs.
-
More embedded #rust on #VexRiscv on #SpinalHDL fun:
-
Stenberg or Reid...or someone else?
@[email protected] on who #SJSharks should pick at No. 2!
Should Sharks try to sign Raddysh? Dan Boyle gives his opinion!
@[email protected] is brought to you by @[email protected] @[email protected]!
Watch/subscribe: https://www.youtube.com/watch?v=vOAPTJplM0Q
-
Stenberg or Reid...or someone else?
@[email protected] on who #SJSharks should pick at No. 2!
Should Sharks try to sign Raddysh? Dan Boyle gives his opinion!
@[email protected] is brought to you by @[email protected] @[email protected]!
Watch/subscribe: https://www.youtube.com/watch?v=vOAPTJplM0Q
-
Stenberg or Reid...or someone else?
@[email protected] on who #SJSharks should pick at No. 2!
Should Sharks try to sign Raddysh? Dan Boyle gives his opinion!
@[email protected] is brought to you by @[email protected] @[email protected]!
Watch/subscribe: https://www.youtube.com/watch?v=vOAPTJplM0Q
-
"That's a penalty all day long!"
@[email protected] was NOT happy about this no-call.
-
"That's a penalty all day long!"
@[email protected] was NOT happy about this no-call.
-
How do you recruit and train new software engineers? At Made Tech I was responsible for running a regular academy programme, which allowed us to increase diversity and reap many more benefits. In this Making Tech Better podcast episode, I spoke to @craigjbass about how to run a successful academy.
You can listen here: https://www.youtube.com/watch?v=-pMq6GgKQuU
-
Eventually the knobs will go into this acrylic piece over the LCD
-
I think this is going to work! I printed a little jig to hold the assembled magnetic knob on top of the LCD and keep the MT6701 aligned to it underneath.
A short Glasgow Interface Explorer script later and it was working 😎 I have a path to mount encoders directly on top of my LCD panel now. The UI opportunities are immense!
-
Now I’m a bit worried about the magnetic flux getting through the 2.5 mm thick LCD panel. The MT6701 specifies min. 300 gauss on the chip surface. We’ll see if these 5mm magnets can do it. Otherwise, the knob base may need to grow for a bigger magnet.
-
3D printed knobs finished during lunch—feeling pretty good. Goal is to have encoders on top of an LCD.
Diametric magnets are harder to come by, so I designed this knob to use axial 5mm round magnets and hold them sideways. There are two 5mm bearings in there to give it perfect glide and hold it vertically stiff. Once I cut some down to size, a 2mm brass rod will hold it all together with push fits on both ends into the 3D printed rotor and cap.
-
I don’t have a pin gauge set, so I’m not sure how well the 3D printed hole came out. Could this justify yet another eBay purchase of a tool that I am already running out of storage space for? The answer is always yes right?!
-
I’m working on a project that requires these teeny tiny 5 mm OD, 2 mm ID ball bearings, and they will be press fitted into a 3D printed stator. Usually I jump straight into an all-up print, but doing a fit test first saved a bunch of trouble this time. The bearings definitely needed ~0.15 mm of extra design tolerance in PETG.
The bearings are very tight spec on the OD. They’re all the same to the limit of my Mitutoyo calipers.
-
Huh, I haven't had Vivado reduce LUT usage after synthesis like this before—at least not drastically like this.
This must be the opt_design stage after synthesis? Or does the placement stage really optimize LUT packing like that?
It's my first timing using “Flow_AreaOptimized_high" and “ExploreArea”. #FPGA #vivado
-
Vivado ran for 4h53m overnight for 7,000 SERV cores, and there's room for more!
Naively, 7000/.83 = 8,433. P&R difficulty increases nonlinearly, so I won't go straight to 8,443. But… how about 8,300? I think I can take second place 😎
-
Vivado ran for 4h53m overnight for 7,000 SERV cores, and there's room for more!
Naively, 7000/.83 = 8,433. P&R difficulty increases nonlinearly, so I won't go straight to 8,443. But… how about 8,300? I think I can take second place 😎
-
Vivado ran for 4h53m overnight for 7,000 SERV cores, and there's room for more!
Naively, 7000/.83 = 8,433. P&R difficulty increases nonlinearly, so I won't go straight to 8,443. But… how about 8,300? I think I can take second place 😎
-
Vivado ran for 4h53m overnight for 7,000 SERV cores, and there's room for more!
Naively, 7000/.83 = 8,433. P&R difficulty increases nonlinearly, so I won't go straight to 8,443. But… how about 8,300? I think I can take second place 😎
-
Nothing like a little BGA reballing practice to get in the mood for bed. These LTM4630Ys are 1.27 mm pitch with 0.75 mm balls. Easy peasy. These 36A DC-DC modules are also $80 each new.
-
Oh. Boy. A lot more init stuff is needed. Well that explains it.
-
-
Well that's kind of frustrating. This LiteDRAM DDR2 controller using sim mode (built-in DRAM model) eats the write transaction, eats the read transaction, and then never responds.
I followed the init_sequence from the generated C code, but I have a hunch more is required.
-
I quite like ethernet on FPGAs. It's not that hard to implement, at least this simple case, and a cheap RGMII PHY gives you a gigabit connection with just some ODDRs and IDDRs. There might be a lot more ethernet in my future designs…
-
It's funny that we get so excited for some LEDs to turn on… but these LEDs mean a lot!
This is my first time lighting up LEDs by sending an ethernet packet to my soft SoC. All the SpinalHDL, auto SVD generation, auto Rust PAC generation, firmware, and timing constraints worked.
I've done a bunch of FPGA stuff before, even implementing my own HDMI RX in SpinalHDL without any vendor IP or wrappers on GTP transceivers. But, I've never gotten around to ethernet before now.
-
It would definitely make it easier to create smaller versions of the SoundSlab grid too. I like this beast, but being modular has advantages!
I can manufacture the individual boards cheaper, or even stuff them at home since the boards would fit in my “reflow oven” *cough* toaster oven.
Also, perhaps someone might want a 4x4 grid for some other fun project.
-
This lunchtime's crazy idea: what if I split the SoundSlab grid into smaller 4x4 pieces + two 1x8 columns for control on the sides?
Fitting FFC connectors seemed impossible, but guess what? Vertical FFC connectors exist! A 40 pin vertical FFC connector would fit right between keys on the back.
The boards would have to be mounted flush next to each other, and there's not really room for board-to-board connectors.
-
What connectors do people like to use for 12V internal power bussing on their projects? (25-50W ish)
I've been using these PCIe 12V connectors, but they’re kind of chunky. They're super convenient though since I had a pile of cables in the closet, and buying ready-made cables is cheap.
There are tons of nice power connector families out there, but often you have to make the cables…
