#synchronouslogic — Public Fediverse posts

For #tinytapeout I want to produce some #asynclogic designs, the challenge being the limited size and IO of course. My initial thought would be something as trivial a ripple-carry adder loop, to meassure the avg. add/s, Interfacing with #synchronouslogic to get data on and off the scan chain. I can do #NCL easily enough but the higher performance alternatives all require custom cell and/or tricky delays for the #QDI #bundleddata. Anyone else working on something like this?