#openlane — Public Fediverse posts
Live and recent posts from across the Fediverse tagged #openlane, aggregated by home.social.
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yosys users group - meet-up #002
September 7th at 18:00 CEST.
We'll start with a demo of our new formal equivalence checker targetting the #OpenLane #ASIC flow. Bring your own design to follow along!
Afterwards we'll have time for your questions and suggestions.
Feel free to bring a friend!Use this link to join:
https://meet.jit.si/NoisyAssembliesExpressEach
The YosysHQ team will be present and are looking forward to meeting you!
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yosys users group - meet-up #002
September 7th at 18:00 CEST.
We'll start with a demo of our new formal equivalence checker targetting the #OpenLane #ASIC flow. Bring your own design to follow along!
Afterwards we'll have time for your questions and suggestions.
Feel free to bring a friend!Use this link to join:
https://meet.jit.si/NoisyAssembliesExpressEach
The YosysHQ team will be present and are looking forward to meeting you!
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Google is supporting the open silicon community with an open sourced process design kit for SkyWater Technology Foundry's 130nm node.
https://opensource.googleblog.com/2022/05/Build%20Open%20Silicon%20with%20Google.html
#Google #OpenSilicon #PDK #Hardware #OpenHardware #OpenSource #SkyWater #130nm #Efabless #OpenMPW #OpenROAD #OpenLane #XLS #ASIC #RISCV #OpenPOWER
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I recently came across Princeton's Reconfigurable Gate Array but I can't quite figure it out. I think perhaps it's a story for architecting FPGAs and then evaluating the architectures. Fabrication might not be part of the story - although maybe any foundry would do. Maybe a project for Google's Free Chips offer (see #skywater, #openlane)??
https://prga.readthedocs.io/en/latest/