#hardwaredebug — Public Fediverse posts

I thought I could skip the Vivado simulation and just flash my VHDL code onto the board.

Lesson learned: when doing an FPGA project, a quick simulation catches bugs that hardware implementation will otherwise scream at you. Run the simulation, save hours, keep the client smiling. ⚙️
https://avallancer.com/services/vhdl-fpga-design-implementation-services/

#FPGA #VHDL #Simulation #HardwareDebug