#timingdiagram — Public Fediverse posts
Live and recent posts from across the Fediverse tagged #timingdiagram, aggregated by home.social.
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One Open-source Project Daily
Digital logic design tool and simulator
https://github.com/logisim-evolution/logisim-evolution
#1ospd #opensource #circuit #circuits #digitalcircuit #digitalcircuits #digitallogic #digitallogicdesign #education #fpga #logic #logisim #logisimevolution #simulator #timingdiagram #verilog #vhdl -
One Open-source Project Daily
Digital logic design tool and simulator
https://github.com/logisim-evolution/logisim-evolution
#1ospd #opensource #circuit #circuits #digitalcircuit #digitalcircuits #digitallogic #digitallogicdesign #education #fpga #logic #logisim #logisimevolution #simulator #timingdiagram #verilog #vhdl -
Turn Timing Diagrams Into ASCII Art, For Friendlier Pasting - We all use text-based fields at one time or another, and being limited to ASCII on... - https://hackaday.com/2022/04/04/turn-timing-diagrams-into-ascii-art-for-friendlier-pasting/ #microcontrollers #softwarehacks #timingdiagram #asciiart #wavedrom #json