#risc_v — Public Fediverse posts

Nice blog post from DeepComputing about their talk and booth on FOSDEM and their meeting with me on their booth:

https://deepcomputing.io/deepcomputing-received-overwhelming-interest-at-fosdem-2025/

@frameworkcomputer

#OpenPrinting #DeepComputing #RISC_V #RISCV #Ubuntu #Snap #FOSDEM #FOSDEM25

@frameworkcomputer Here is a link to the thread with @zygoon :

https://fosstodon.org/@zygoon/113944939785535479

#OpenPrinting #DeepComputing #RISC_V #RISCV #Ubuntu #Snap #FOSDEM #FOSDEM25

@frameworkcomputer

As I told earlier here in a longer thread with @zygoon , Yuning Liang, founder of DeepComputing has donated their RISC-V board for Framework laptops to OpenPrinting on the last FOSDEM. Thanks a lot!!

Now we can test the printing stack on this platform, including making Snaps for RISC-V.

Printing works so far, by the way.

And here are my adventures of setting it up:

https://openprinting.github.io/OpenPrinting-News-We-got-a-Framework-RISC-V-board-from-DeepComputing/

#OpenPrinting #DeepComputing #RISC_V #RISCV #Ubuntu #Snap #FOSDEM #FOSDEM25

Inside SiFive’s P550 Microarchitecture
🔗 https://old.chipsandcheese.com/2025/01/26/inside-sifives-p550-microarchitecture/

"The P550 is a 3-wide out-of-order core with a 13 stage pipeline. Out-of-order execution lets the core move past a stalled instruction to extract instruction level parallelism. It’s critical for achieving high performance because cache and memory latency can be significant limiters for modern CPUs."

#RISCV #RISC_V #ComputerArchitecture #CPU #CPUs #Processor #Processors #Hardware #ComputerHardware #Eswin #EC7700X #SiFive #P550