#cxl — Public Fediverse posts
Live and recent posts from across the Fediverse tagged #cxl, aggregated by home.social.
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Most CXL coverage collapses three separate things into one, which is why the technology reads as both imminent and permanently delayed.
Expansion gives a single host extra CXL-attached memory as a second tier. It is in production at hyperscale — 768 GB of local DDR5-6400 alongside 256 GB of reclaimed DDR4-2400 per node, at 0.13 the cost per gigabyte of local DRAM, because those DIMMs were already bought.
Pooling gives several hosts exclusive slices of a shared device, and does not require a switch: a multi-port device pools across whatever hosts plug into it. NSDI '26 measurements put multi-port paths at 260–300 ns against 490–600 ns switched.
Sharing — many hosts on one region, coherent in hardware — is defined in CXL 3.0 and absent from shipping devices.
The economics are the open question. Google researchers put switched break-even around 24 nodes. The same NSDI work finds sparse multi-port topologies save 3% to 5.4%. Topology decides.
#CXL #ComputeExpressLink #MemoryPooling #ServerMemory #DataCenter #Disaggregation #Interconnect #DRAM #DDR4 #DDR5 #AIInfrastructure
https://www.buysellram.com/blog/cxl-memory-explained-can-servers-finally-share-ram/
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Meta measures 43.7% of its servers as memory-capacity bound. They run out of RAM before they run out of cores, network, or storage.
CXL is the standard meant to fix that, and it is further along than most coverage suggests in one direction and further behind in another. Expansion runs in production today. Pooling works on real hardware.
#CXL #ComputeExpressLink #MemoryPooling #ServerMemory #DataCenter #Interconnect #DRAM #DDR4 #DDR5 #AIInfrastructure #tech
https://www.buysellram.com/blog/cxl-memory-explained-can-servers-finally-share-ram/
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Meta measures 43.7% of its servers as memory-capacity bound. They run out of RAM before they run out of cores, network, or storage.
CXL is the standard meant to fix that, and it is further along than most coverage suggests in one direction and further behind in another. Expansion runs in production today. Pooling works on real hardware.
#CXL #ComputeExpressLink #MemoryPooling #ServerMemory #DataCenter #Interconnect #DRAM #DDR4 #DDR5 #AIInfrastructure #tech
https://www.buysellram.com/blog/cxl-memory-explained-can-servers-finally-share-ram/
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RAM has always been trapped inside the server it shipped in — one machine's shortage next to another's idle gigabytes. SK hynix now says memory could be sold as a subscription instead. This explainer covers the technology that would carry it: CXL, memory appliances, rack-level switches, and tiering — plus Meta's production proof that pooled thinking already pays, right down to reused DDR4.
https://www.buysellram.com/blog/memory-as-a-service-cxl/
#MemoryAsAService #CXL #DRAM #DataCenter #AIInfrastructure #SKhynix #MemoryPooling -
RAM has always been trapped inside the server it shipped in — one machine's shortage next to another's idle gigabytes. SK hynix now says memory could be sold as a subscription instead. This explainer covers the technology that would carry it: CXL, memory appliances, rack-level switches, and tiering — plus Meta's production proof that pooled thinking already pays, right down to reused DDR4.
https://www.buysellram.com/blog/memory-as-a-service-cxl/
#MemoryAsAService #CXL #DataCenter #AIInfrastructure #DRAM #Semiconductors
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SK hynix's parent group says it may offer "Memory as a Service" — RAM capacity sold like a cloud subscription rather than a chip in a box. The idea is early, but the hardware underneath it is not.
This explainer walks through the full stack: why memory gets stranded inside servers, how CXL adds the cache coherency that PCIe never had, what memory appliances and CXL 3.0 switches actually do, and why tiering keeps local DRAM first. It also draws a line many articles blur — memory expansion (which Meta already runs across millions of servers, reusing retired DDR4) versus rack-level pooling, which is only now reaching real silicon.
The business angle matters too: subscriptions would smooth the boom-and-bust cycle memory makers have never escaped. And for everyone else, the takeaway is simpler — memory is becoming an asset with value independent of the server it shipped in.
https://www.buysellram.com/blog/memory-as-a-service-cxl/
#MemoryAsAService #CXL #DRAM #DataCenter #AIInfrastructure #SKhynix #MemoryPooling #DDR4 #ServerHardware #Semiconductors #AIHardware #ITAD #technology -
SK hynix's parent group says it may offer "Memory as a Service" — RAM capacity sold like a cloud subscription rather than a chip in a box. The idea is early, but the hardware underneath it is not.
This explainer walks through the full stack: why memory gets stranded inside servers, how CXL adds the cache coherency that PCIe never had, what memory appliances and CXL 3.0 switches actually do, and why tiering keeps local DRAM first. It also draws a line many articles blur — memory expansion (which Meta already runs across millions of servers, reusing retired DDR4) versus rack-level pooling, which is only now reaching real silicon.
The business angle matters too: subscriptions would smooth the boom-and-bust cycle memory makers have never escaped. And for everyone else, the takeaway is simpler — memory is becoming an asset with value independent of the server it shipped in.
https://www.buysellram.com/blog/memory-as-a-service-cxl/
#MemoryAsAService #CXL #DRAM #DataCenter #AIInfrastructure #SKhynix #MemoryPooling #DDR4 #ServerHardware #Semiconductors #AIHardware #ITAD #technology -
RAM has always been trapped inside the server it shipped in — one machine's shortage next to another's idle gigabytes. SK hynix now says memory could be sold as a subscription instead. This explainer covers the technology that would carry it: CXL, memory appliances, rack-level switches, and tiering — plus Meta's production proof that pooled thinking already pays, right down to reused DDR4.
https://www.buysellram.com/blog/memory-as-a-service-cxl/
#MemoryAsAService #CXL #DataCenter #AIInfrastructure #DRAM #Semiconductors #tech
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RAM has always been trapped inside the server it shipped in — one machine's shortage next to another's idle gigabytes. SK hynix now says memory could be sold as a subscription instead. This explainer covers the technology that would carry it: CXL, memory appliances, rack-level switches, and tiering — plus Meta's production proof that pooled thinking already pays, right down to reused DDR4.
https://www.buysellram.com/blog/memory-as-a-service-cxl/
#MemoryAsAService #CXL #DataCenter #AIInfrastructure #DRAM #Semiconductors #tech
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Dentro la gerarchia della memoria delle GPU: come i server AI spostano i dati dagli SSD alla HBM
Ti sei mai chiesto come i modelli di intelligenza artificiale trasferiscono i dati alla GPU? Questo articolo spiega in modo semplice i diversi livelli di memoria all'interno di un server AI, perché la memoria della GPU è diventata un collo di bottiglia e quali nuove tecnologie potrebbero migliorare le prestazioni dell'intelligenza artificiale.
buysellram.com/blog/inside-the…
#HBM #HBM4 #GPUMemory #AIInfrastructure #DataCenter #CXL #HighBandwidthFlash #AIHardware #MemoryHierarchy #AIInference #NVMe #ITAD
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Dentro la gerarchia della memoria delle GPU: come i server AI spostano i dati dagli SSD alla HBM
Ti sei mai chiesto come i modelli di intelligenza artificiale trasferiscono i dati alla GPU? Questo articolo spiega in modo semplice i diversi livelli di memoria all'interno di un server AI, perché la memoria della GPU è diventata un collo di bottiglia e quali nuove tecnologie potrebbero migliorare le prestazioni dell'intelligenza artificiale.
buysellram.com/blog/inside-the…
#HBM #HBM4 #GPUMemory #AIInfrastructure #DataCenter #CXL #HighBandwidthFlash #AIHardware #MemoryHierarchy #AIInference #NVMe #ITAD
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A modern AI server runs five layers of memory, from nanosecond on-chip SRAM to petabyte-scale SSDs, and keeping the GPU fed is the whole engineering game. This piece walks the full hierarchy: why HBM became the bottleneck, why adding more isn't simple, and where HBF, CXL, and PIM fit into the next generation.
#HBM #HBM4 #GPUMemory #AIInfrastructure #DataCenter #CXL #HighBandwidthFlash #AIHardware #MemoryHierarchy #AIInference #NVMe #ITAD #buysellram
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Why can't a GPU just carry more HBM? Interposers max out in size, stacking 12 to 16 DRAM dies compounds yield losses, and every stack sits beside a kilowatt-class package that hates sharing heat. So capacity climbs in careful steps — 80 GB on the H100, 141 on the H200, 192 on the B200, 288 on Blackwell Ultra — while KV caches for long-context inference balloon past 40 GB per request.
That gap between what models demand and what packaging permits is reshaping server design. NVIDIA's Rubin platform treats CPU memory and HBM as one coherent pool. SanDisk and SK hynix are standardizing High Bandwidth Flash as a capacity tier under HBM, with first samples due this half. CXL 4.0 pooling hardware is landing in racks now.
This article walks the whole memory hierarchy, from on-chip SRAM to NVMe, and explains what each emerging technology actually solves — and what it doesn't.
#HBM #HBM4 #GPUMemory #AIInfrastructure #DataCenter #CXL #HighBandwidthFlash #AIHardware #MemoryHierarchy #AIInference #NVMe #ITAD #technology
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Why can't a GPU just carry more HBM? Interposers max out in size, stacking 12 to 16 DRAM dies compounds yield losses, and every stack sits beside a kilowatt-class package that hates sharing heat. So capacity climbs in careful steps — 80 GB on the H100, 141 on the H200, 192 on the B200, 288 on Blackwell Ultra — while KV caches for long-context inference balloon past 40 GB per request.
That gap between what models demand and what packaging permits is reshaping server design. NVIDIA's Rubin platform treats CPU memory and HBM as one coherent pool. SanDisk and SK hynix are standardizing High Bandwidth Flash as a capacity tier under HBM, with first samples due this half. CXL 4.0 pooling hardware is landing in racks now.
This article walks the whole memory hierarchy, from on-chip SRAM to NVMe, and explains what each emerging technology actually solves — and what it doesn't.
#HBM #HBM4 #GPUMemory #AIInfrastructure #DataCenter #CXL #HighBandwidthFlash #AIHardware #MemoryHierarchy #AIInference #NVMe #ITAD #technology
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A modern AI server runs five layers of memory, from nanosecond on-chip SRAM to petabyte-scale SSDs, and keeping the GPU fed is the whole engineering game. This piece walks the full hierarchy: why HBM became the bottleneck, why adding more isn't simple, and where HBF, CXL, and PIM fit into the next generation.
#HBM #HBM4 #GPUMemory #AIInfrastructure #DataCenter #CXL #HighBandwidthFlash #AIHardware #MemoryHierarchy #AIInference #NVMe #tech
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A modern AI server runs five layers of memory, from nanosecond on-chip SRAM to petabyte-scale SSDs, and keeping the GPU fed is the whole engineering game. This piece walks the full hierarchy: why HBM became the bottleneck, why adding more isn't simple, and where HBF, CXL, and PIM fit into the next generation.
#HBM #HBM4 #GPUMemory #AIInfrastructure #DataCenter #CXL #HighBandwidthFlash #AIHardware #MemoryHierarchy #AIInference #NVMe #tech
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Иллюзия памяти: как индустрия десятилетиями маскировала ограничения железа
Сейчас память можно увеличить ползунком, Redis поднять одной командой, а состояние сервера оценить по строке в панели управления. Но за этим удобством стоит история компромиссов — сначала инженерам пришлось научить компьютеры работать так, будто памяти больше, чем есть на самом деле, потом диски собрали в массивы, горячие данные перенесли в Redis, а всю эту сложность спрятали за хостингом и managed-сервисами. Индустрия десятилетиями строила убедительные иллюзии поверх ограниченной физической реальности, но почему-то памяти до сих пор недостаточно. Как? Разобрал в статье. Читать
https://habr.com/ru/companies/ruvds/articles/1033394/
#память #виртуальная_память #RAID #Redis #latency #distributed_systems #HBM #CXL #кэширование #ruvds_статьи
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CXL ermöglicht geteilte Arbeitsspeicher-Pools in Rechenzentren. Mehrere Server greifen gleichzeitig auf dieselben Daten im RAM zu. Das soll DRAM-Knappheit lindern. #CXL #Datacenter https://winfuture.de/news,158619.html?utm_source=Mastodon&utm_medium=ManualStatus&utm_campaign=SocialMedia
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CXL ermöglicht geteilte Arbeitsspeicher-Pools in Rechenzentren. Mehrere Server greifen gleichzeitig auf dieselben Daten im RAM zu. Das soll DRAM-Knappheit lindern. #CXL #Datacenter https://winfuture.de/news,158619.html?utm_source=Mastodon&utm_medium=ManualStatus&utm_campaign=SocialMedia
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PCIe умер, да здравствует CXL [часть 2]: сервер на 5+ лет с DDR4
Привет постоянным и не очень читателям :) Сегодня я буду говорить про подбор серверов, но хочу отойти от скучных, быстро устаревающих и зачастую не применимых на практике рекомендаций — мол, памяти, дорогие админы, надо столько-то, а вот поколение процессора и количество ядер обязательно такие-то, иначе система деградирует после дождичка в четверг. Ремарка! Я не против конкретных цифр и конфигураций — я против попытки выдать их за универсальный рецепт. Так что этот подход оставим для SEO-статей. В этом же лонгриде я затрону ошибки мышления при подборе серверов на 5+ лет и сдвиги, которые произошли за последние годы (и особенно хочу поговорить про огромное влияние CXL). Я плотно работаю в этой индустрии больше 6 лет и прошел подобный цикл на практике, да и админы-старожилы рассказали много интересного о том, что было раньше. Присаживаемся, ложимся или в какой там позе вы читаете — и начинаем. Мощный сервер — выбор слабых админов Дропдаун
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Наконец, CXL.mem — он позволяет процессору хоста обращаться к памяти устройства как к своей собственной. Устройство выступает в роли агента памяти (Memory Device), и CPU использует обычные инструкции работы с памятью, как если бы это была его собственная DDR. Стандарт CXL изначально разрабатывался с учетом работы как с энергозависимой, так и с энергонезависимой памятью (Persistent Memory). В PCIe доступ к памяти устройства требует отдельного драйвера и происходит через барьеры и прерывания, что создает задержки и накладные расходы. CXL.mem интегрирует эту память в единое когерентное адресное пространство системы.
Совместно эти протоколы реализуют кэш-когерентный обмен данными между процессорами, устройствами и ускорителями. В результате система может динамически увеличивать объём оперативной памяти и ускорять обмен данными, не перегружая сетевые интерфейсы.
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CXL основан на физическом слое PCIe, но вводит три новых протокола:
Сначала CXL.io — это, по сути, PCIe с некоторыми расширениями для работы в рамках CXL (например, новые типы транзакций для управления когерентностью на уровне протокола). Он не уступает в скорости PCIe и обеспечивает базовое взаимодействие. И да — CXL.io некогерентный. Одна физическая линия (lane) PCIe может нести трафик CXL.io, CXL.cache и CXL.mem одновременно, динамически распределяя полосу пропускания между ними, экономя ресурсы. PCIe так не умеет.
Дальше CXL.cache — этот протокол позволяет ускорителям (типа GPU или NIC) кэшировать данные из памяти хоста прямо у себя, с низкой задержкой, чтобы поддерживать когерентность своего локального кэша. Это снижает трафик на шине. Задержки минимальны — в диапазоне 60-100 нс для доступа к кэшу устройства, что кардинально меньше, чем у традиционных механизмов с программным обеспечением когерентности (которые могут занимать микросекунды).
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CXL (Compute Express Link) — свежий стандарт интерконнекта, появившийся в 2019 году.
Его главная фича — новый подход для работы с памятью и вычислениями: поддержка когерентного кэша и трафика между процессорами и ускорителями, возможность собирать инфраструктуру как конструктор, гибко распределяя ресурсы, и другой функционал.
CXL — это интерконнект. Он использует физическую и электрическую основу PCIe, а сверху предлагает свои протоколы.
Важно! CXL работает, начиная с PCIe 5.0, а старые платформы (Xeon Scalable до Sapphire Rapids или EPYC до Genoa) не поддерживают CXL. Так что поставить карточку CXL в старый сервер не получится.
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GigaByte CXL memory expansion card with up to 512GB DRAM
https://www.gigabyte.com/PC-Accessory/AI-TOP-CXL-R5X4
#HackerNews #GigaByte #CXL #memory #expansion #card #DRAM #technology #512GB #PC #accessories
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GigaByte CXL memory expansion card with up to 512GB DRAM
https://www.gigabyte.com/PC-Accessory/AI-TOP-CXL-R5X4
#HackerNews #GigaByte #CXL #memory #expansion #card #DRAM #technology #512GB #PC #accessories
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A #CXL progress report: The elephant is learning to dance Jim Handy: CXL-based memory sales won’t take off until 2027 when there’s software to support CXL’s features eejournal.com/article/a-cx...
A CXL progress report: The ele... -
A #CXL progress report: The elephant is learning to dance Jim Handy: CXL-based memory sales won’t take off until 2027 when there’s software to support CXL’s features eejournal.com/article/a-cx...
A CXL progress report: The ele... -
CXL-Тестирование интерконнекта для дата-центров нового поколения
Привет, Хабр! На связи Максим Башмаков, руководитель
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System memory expansion cards, where have I seen that before? 🤔 😜
What was old is new again.
Level 1 Techs: PCIe RAM? In MY Server? With CXL, It's Possible!
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System memory expansion cards, where have I seen that before? 🤔 😜
What was old is new again.
Level 1 Techs: PCIe RAM? In MY Server? With CXL, It's Possible!
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Design and Implementation of a Scalable Naming Service in Shared Memory
Inria
Are you interested in low-level features such as # virtualization extensions and cutting-edge features such as #cxl? Join us for a #cs #phd at Inria!
See the full job description on jobRxiv: https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-se...
https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-service-in-sha/?feed_id=89954 -
Design and Implementation of a Scalable Naming Service in Shared Memory
Inria
Are you interested in low-level features such as # virtualization extensions and cutting-edge features such as #cxl? Join us for a #cs #phd at Inria!
See the full job description on jobRxiv: https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-se...
https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-service-in-sha/?feed_id=89954 -
Design and Implementation of a Scalable Naming Service in Shared Memory
Inria
Are you interested in low-level features such as # virtualization extensions and cutting-edge features such as #cxl? Join us for a #cs #phd at Inria!
See the full job description on jobRxiv: https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-se...
https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-service-in-sha/?feed_id=87924 -
Design and Implementation of a Scalable Naming Service in Shared Memory
Inria
Are you interested in low-level features such as # virtualization extensions and cutting-edge features such as #cxl? Join us for a #cs #phd at Inria!
See the full job description on jobRxiv: https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-se...
https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-service-in-sha/?feed_id=87924 -
Back in the day, you would upgrade your PC's RAM by installilng cards into AT bus slots. The equivalent today is using CXL expansion cards on systems that support certain CXL profiles.
Now, you can just add a whole new rack shelf of RAM to add another 96 slots 😅
ServeTheHome: Inventec 96 DIMM CXL Expansion Box at OCP Summit 2024 for TBs of Memory
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Back in the day, you would upgrade your PC's RAM by installilng cards into AT bus slots. The equivalent today is using CXL expansion cards on systems that support certain CXL profiles.
Now, you can just add a whole new rack shelf of RAM to add another 96 slots 😅
ServeTheHome: Inventec 96 DIMM CXL Expansion Box at OCP Summit 2024 for TBs of Memory
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Design and Implementation of a Scalable Naming Service in Shared Memory
Inria
Are you interested in low-level features such as # virtualization extensions and cutting-edge features such as #cxl? Join us for a #cs #phd at Inria!
See the full job description on jobRxiv: https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-se...
https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-service-in-sha/?feed_id=84140 -
Design and Implementation of a Scalable Naming Service in Shared Memory
Inria
Are you interested in low-level features such as # virtualization extensions and cutting-edge features such as #cxl? Join us for a #cs #phd at Inria!
See the full job description on jobRxiv: https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-se...
https://jobrxiv.org/job/inria-27778-phd-position-design-and-implementation-of-a-scalable-naming-service-in-sha/?feed_id=84140 -
Что нового слышно о шине CXL: заметки с саммита по вычислениям, памяти и хранению данных
Приветствую, на связи снова Сергей Баширов, ведущий разработчик из R&D-команды Cloud.ru. Недавно я посетил очередной Compute, Memory, and Storage Summit , на котором было довольно много докладов на тему Compute Express Link (CXL). В статье сделал краткую выжимку из выступлений, а также поделился своими наблюдениями и выводами. Рассказал, чем полезна CXL и как устроена эта технология, разобрал сценарии применения в облачной инфраструктуре, а также поделился ссылками на интересные доклады по теме. Читать дальше
https://habr.com/ru/companies/cloud_ru/articles/845946/
#cxl #pci_express #когерентность #суперкомпьютеры #CXL_в_облаке #rdma #compute_express_link #память #gocloud_tech
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📈 CXL Gathers Momentum at FMS 2024
https://www.anandtech.com/show/21533/cxl-gathers-momentum-at-fms-2024
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📈 CXL Gathers Momentum at FMS 2024
https://www.anandtech.com/show/21533/cxl-gathers-momentum-at-fms-2024
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The Current State Of #CXL Support On #Linux
With Linux 6.11 there is now a notifier handler to deal with newly-created CXL memory regions to have their abstract distance metrics calculated, which is needed for proper memory tiering with regards to performance capabilities. The CXL code in Linux 6.11 also has a number of fixes, XOR math is added to address the CXL DPA to SPA translation, and various other updates.
https://www.phoronix.com/news/Linux-6.11-CXL -
The Current State Of #CXL Support On #Linux
With Linux 6.11 there is now a notifier handler to deal with newly-created CXL memory regions to have their abstract distance metrics calculated, which is needed for proper memory tiering with regards to performance capabilities. The CXL code in Linux 6.11 also has a number of fixes, XOR math is added to address the CXL DPA to SPA translation, and various other updates.
https://www.phoronix.com/news/Linux-6.11-CXL
